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ATS128 Datasheet(PDF) 17 Page - Allegro MicroSystems |
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ATS128 Datasheet(HTML) 17 Page - Allegro MicroSystems |
17 / 25 page Highly Programmable, Back-Biased, Hall-Effect Switch with TPOS Functionality ATS128LSE 17 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com Fuse Checking Incorporated in the ATS128 is circuitry to simultaneously check the integrity of the fuse bits. The fuse checking feature is enabled by using the Fuse Checking registers, and while in Try mode, applying the codes shown in table 3. The register is only valid in Try mode and is available before or after the programming LOCK bit is set. Selecting the Fuse Threshold High register checks that all blown fuses are properly blown. Selecting the Fuse Threshold Low register checks all un-blown fuses are properly intact. The supply current, ICC, increases by 250 μA if a marginal fuse is detected. If all fuses are correctly blown or fully intact, there will be no change in supply current. Output Polarity When selecting the BOP registers in Try mode, the output polarity is determined by the value of the Output Polarity bit (POL). The default value is POL = 0 (fuse un-blown). For applications that require the output states defined by POL = 1 (see Operating Char- acteristics table), it is recommended to first permanently blow the POL bit by selecting the Output / Lock bit register, and code 4. The output is then defined by POL = 1 when selecting the BOP Try mode registers. See table 3 for parameter details. Additional Guidelines The additional guidelines in this section should be followed to ensure the proper behavior of these devices: • The power supply used for programming must be capable of delivering at least VPH and IPP. • Be careful to observe the tLOW delay time before powering down the device after blowing each bit. • Set the LOCK bit (only after all other parameters have been programmed and validated) to prevent any further programming of the device. Read Mode The ATS128 features a Read mode that allows the status of each programmable fuse to be read back individually. The status, blown or not blown, of the addressed fuse is determined by moni- toring the state of the VOUT pin. A complete example is shown in figure 11. Read mode uses the same register selection keys as Blow mode (see table 3), allowing direct addressing of the individual fuses in the BOPPOL and BOPSEL registers (do not inadvertently send a Blow pulse while in Read mode). After sending the register and mode selection keys, that is, after the falling edge of the final VPH pulse in the key, the first bit (the LSB) is selected. Each addi- Figure 11. Read mode example. Pulse sequence for accessing the BOP Selection register (BOPSEL) and reading back the status of each of the eight bit fields. In this example, the code (blown fuses) is 2 + 22 +25 + 27 = 166 (10100110). After each address pulse is sent, the voltage on the VOUT pin will be at GND for un-blown fuses and at VCC (at VPL or VPM) for blown fuses. VPH VPM VPL VPH VPM VPL GND Register (and Mode) Selection Key Bit Field (Fuse) Address Codes Read-out on VOUT pin 1234567 1 234567 8 9 10 11 GND Fuse intact Fuse blown Don’t Care |
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