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DS1249AB Datasheet(PDF) 1 Page - Dallas Semiconductor |
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DS1249AB Datasheet(HTML) 1 Page - Dallas Semiconductor |
1 / 8 page 1 of 8 033004 FEATURES 10 years minimum data retention in the absence of external power Data is automatically protected during power loss Unlimited write cycles Low-power CMOS operation Read and write access times as fast as 70 ns Lithium energy source is electrically disconnected to retain freshness until power is applied for the first time Full ±=10% V CC operating range (DS1249Y) Optional ±=5% V CC operating range (DS1249AB) Optional industrial temperature range of -40 °C to +85°C, designated IND JEDEC standard 32-pin DIP package PIN ASSIGNMENT PIN DESCRIPTION A0 - A17 - Address Inputs DQ0 - DQ7 - Data In/Data Out CE - Chip Enable WE - Write Enable OE - Output Enable VCC - Power (+5V) GND - Ground NC - No Connect DESCRIPTION The DS1249 2048k Nonvolatile SRAMs are 2,097,152-bit, fully static, nonvolatile SRAMs organized as 262,144 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry which constantly monitors VCC for an out-of-tolerance condition. When such a condition occurs, the lithium energy source is automatically switched on and write protection is unconditionally enabled to prevent data corruption. There is no limit on the number of write cycles which can be executed and no additional support circuitry is required for microprocessor interfacing. DS1249Y/AB 2048k Nonvolatile SRAM www.maxim-ic.com 13 1 2 3 4 5 6 7 8 9 10 11 12 14 31 32-Pin ENCAPSULATED PACKAGE 740-mil EXTENDED A14 A7 A5 A4 A3 A2 A1 A0 DQ1 DQ0 VCC A15 A17 WE A13 A8 A9 A11 OE A10 CE DQ7 DQ5 DQ6 32 30 29 28 27 26 25 24 23 22 21 19 20 A16 A12 A6 NC DQ2 GND 15 16 18 17 DQ4 DQ3 |
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