A1365LKTTN-5-T datasheet(28/32 Pages) ALLEGRO | Low-Noise, High-Precision, Programmable Linear Hall-Effect Sensor IC

28 / 32 page

Low-Noise, High-Precision, Programmable Linear Hall-Effect Sensor IC

With High-Bandwidth (120 kHz) Analog Output and Integrated Fault Comparator

A1365

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Read (Controller to A1365)

The fields for the Read command are:

• Sync (2 zero bits)

• Read/Write (1 bit, must be 1 for read)

• Address (6 bits) (ADDR[5] is 0 for EEPROM, 1 for register)

• CRC (3 bits)

Figure 28 shows the sequence for a Read command.

Synchronize

MSB

Read/Write

0 0 1

Memory Address

CRC

0/1

0/1 0/1 0/1 0/1 0/1 0/1 0/1

Figure 28: Read Sequence

Read Acknowledge (A1365 to Controller)

The fields for the data return frame are:

• Sync (2 zero bits)

• Data (30 bits: [29:26] Don’t Care, [25:24] ECC Pass/Fail,

[23:0] Data)

• CRC (3 bits)

Figure 29 shows the sequence for a Read Acknowledge. Refer to

the Detecting ECC Error section for instructions on how to detect

and ECC failure.

Synchronize

MSB

Data

(30 bits maximum)

CRC

0 0

0/1 0/1

. . . 0/1 0/1 0/1 0/1 0/1

Figure 29: Read Acknowledge Sequence

Write (Controller to A1365)

The fields for the Write command are:

• Sync (2 zero bits)

• Read/Write (1 bit, must be 0 for write)

• Address (6 bits) (ADDR[5] is 0 for EEPROM, 1 for register;

refer to the address map)

• Data (30 bits: [29:24] Don’t Care, [23:0] Data)

• CRC (3 bits)

Figure 30 shows the sequence for a Write command. Bits [29:24]

are Don’t Care because the A1365 automatically generates 6 ECC

bits based on the content of bits [23:0]. These ECC bits will be

stored in EEPROM at locations [29:24].

Synchronize

MSB

Data

(30 bits maximum)

Read/Write

0 0 0

Memory Address

CRC

0/1

0/1 0/1 0/1 0/1 0/1 0/1 0/1 . . . 0/1 0/1 0/1 0/1

Figure 30: Write Sequence

Write Access Code (Controller to A1365)

The fields for the Access Code command are:

• Sync (2 zero bits)

• Read/Write (1 bit, must be 0 for write)

• Address (6 bits) (Address 0X24 for Customer Access)

• Data (30 bits) (0x2781_1F77 for Customer Access)

• CRC (3 bits)

Figure 31 shows the sequence for an Access Code command.

Synchronize

MSB

Data

(30 bits)

Read/Write

0 0 0

Memory Address

CRC

0 1 0 0 0/1 0/1 0/1 . . . 0/1 0/1 0/1 0/1

Figure 31: Access Code Write Sequence

The controller must open the serial communication with the

A1365 device by sending an Access Code. It must be sent within

Access Code Timeout (tACC ) from power-up or the device will

be disabled for read and write access.

Shadow Mode

For faster programming, Shadow Mode puts the sensor in a try

mode where one can write to the EEPROM registers as if they

are volatile registers. This is especially useful when searching

for Sensitivity, QVO, and Over Field Fault codes. Once the

desired codes are identified, the user should exit Shadow Mode

and execute an EEPROM Write. If a power-cycle is executed

during Shadow Mode, the registers will reset to their initial state.

SHADOW_ENABLE bit should be set to enter Shadow Mode.

Access Codes Information

Name

Serial Interface Format

(Hex)

Data (Hex)

Customer

0x24

0x2781_1F77

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