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A1363LKTTN-5-T Datasheet(PDF) 27 Page - Allegro MicroSystems |
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A1363LKTTN-5-T Datasheet(HTML) 27 Page - Allegro MicroSystems |
27 / 30 page Low Noise, High Precision, Programmable Linear Hall Effect Sensor IC With Advanced Temperature Compensation And High Bandwidth (120 kHz) Analog Output A1363 27 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com EEPROM CELL ORGANIZATION Programming coefficients are stored in non-volatile EEPROM, which is separate from the digital subsystem, and accessed by the digital subsystem EEPROM Controller module. The EEPROM is organized as 30 bit wide words, each word is made up of 24 data bits and 6 ECC (Error Checking and Correction) check bits, stored as shown in table below. EEPROM Word Bit Sequence; C# – Check Bit, D# – Data Bit 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 EEPROM Bit 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 Contents C5 C4 C3 C2 C1 C0 D23 D22 D21 D20 D19 D18 D17 D16 D15 Memory Address Map Register Name Address Description r/w Bits Location Customer Access EEPROM SENS_FINE1 0x00 Sensitivity, two’s complement DAC profile r/w 9 8:0 SENS_COARSE Coarse Sensitivity r/w 2 10:9 QVO1 Quiescent Output Voltage, two’s complement DAC profile r/w 9 19:11 (Factory reserved)2 Factory reserved bit r/w 1 20 POL Reverses output polarity r/w 1 21 CLAMP_DIS Clamp Disable r/w 1 22 EELOCK EEPROM LOCK w 1 23 ID_C3 0x01 Customer Reserved r/w 24 23:0 Customer Debug Register (Volatile Memory) Disable Analog Output 0x10 Turns off the analog output for serial communications w 1 0 Shadow Enable Enables register shadowing to bypass EEPROM register 0x00 bits 22:0 w 1 1 1 9-bit two’s complement integers, where the most positive number is indicated by code 255 (decimal) and the most negative number by code 256 (decimal). 2 Customer should not write to this bit. 3 Can be used to store any information required in the customer’s application. |
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