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SN74AS138D Datasheet(PDF) 1 Page - Texas Instruments |
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SN74AS138D Datasheet(HTML) 1 Page - Texas Instruments |
1 / 20 page SN54ALS138A, SN54AS138, SN74ALS138A, SN74AS138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SDAS055E – APRIL 1982 – REVISED JULY 1996 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems D Incorporate Three Enable Inputs to Simplify Cascading and /or Data Reception D Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs description The ′ALS138A and ′AS138 are 3-line to 8-line decoders/demultiplexers designed for high- performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance systems, these devices can be used to minimize the effects of system decoding. When employed with high-speed memories with a fast enable circuit, the delay times of the decoder and the enable time of the memory are usually less than the typical access time of the memory. The effective system delay introduced by the Schottky-clamped system decoder is negligible. The conditions at the binary-select (A, B, and C) inputs and the three enable (G1, G2A, and G2B) inputs select one of eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. The SN54ALS138A and SN54AS138 are characterized for operation over the full military temperature range of – 55 °C to 125°C. The SN74ALS138A and SN74AS138 are characterized for operation from 0°C to 70°C. Copyright © 1996, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. SN54ALS138A, SN54AS138 ...J PACKAGE SN74ALS138A, SN74AS138 ...D OR N PACKAGE (TOP VIEW) 3 2 1 20 19 910 11 12 13 4 5 6 7 8 18 17 16 15 14 Y1 Y2 NC Y3 Y4 C G2A NC G2B G1 SN54ALS138A, SN54AS138 . . . FK PACKAGE (TOP VIEW) NC – No internal connection 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 A B C G2A G2B G1 Y7 GND VCC Y0 Y1 Y2 Y3 Y4 Y5 Y6 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. |
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