TMDS_D2+

TMDS_GND

TMDS_D2–

TMDS_D1+

TMDS_GND

TMDS_D1–

TMDS_D0+

TMDS_GND

TMDS_D0–

TMDS_CK+

TMDS_GND

TMDS_CK–

5V_SUPPLY

DDC_DAT_OUT

HOTPLUG_DET_OUT

ESD_BYP

LV Supply

LV Supply

CE_REMOTE_IN

CE_REMOTE_OUT

DDC_DAT_IN

LV Supply

LV Supply

DDC_CLK_IN

DDC_CLK_OUT HOTPLUG_DET_IN

TPD12S520

www.ti.com

SLVS640F – OCTOBER 2007 – REVISED FEBRUARY 2015

7 Detailed Description

7.1 Overview

The TPD12S520 is a single-chip ESD solution for the HDMI receiver port. In many cases the core ICs, such as

the scalar chipset, may not have robust ESD cells to sustain system-level ESD strikes. In these cases, the

TPD12S520 provides the desired system-level ESD protection, such as the IEC61000-4-2 (Level 4) ESD, by

absorbing the energy associated with the ESD strike.

While providing the ESD protection, the TPD12S520 adds little or no additional glitch in the high-speed

differential signals (see Figure 7 and Figure 8). The high-speed TMDS lines add only 0.8-pF capacitance to the

lines. In addition, the monolithic integrated circuit technology ensures that there is excellent matching between

the two-signal pair of the differential line. This is a direct advantage over discrete ESD clamp solutions where

variations between two different ESD clamps may significantly degrade the differential signal quality.

The low-speed control lines offer voltage-level shifting to eliminate the need for an external voltage level-shifter

IC. The control line ESD clamps add 3.5-pF capacitance to the control lines. The 38-pin DBT package offers a

seamless layout routing option to eliminate the routing glitch for the differential signal pairs. DBT package pitch

(0.5 mm) matches with HDMI connector pitch. In addition, pin mapping follows the same order as the HDMI

connector pin mapping. The 24-pin RMN package offers flow through routing using only two layers for highly

integrated, space-efficient full HDMI protection.

7.2 Functional Block Diagram

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