GM72V66841CT datasheet(25/57 Pages) LG

Part #	GM72V66841CT

Description	2,097,152 WORD x 8 BIT x 4 BANK SYNCHRONOUS DYNAMIC RAM

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LG Semicon

GM72V66841CT/CLT

Command Intervals

Read command to Read command interval:

1. Same bank, same ROW address:

When another read command is executed at the

same ROW address of the same bank as the

preceding read command execution, the second

read can be performed after an interval of no less

than 1 cycle.

Even when the first command is a burst read that

is not yet finished, the data read by the second

command will be valid.

READ to READ Command Interval (Same Row Address in Same Bank)

CLK

Command

Address

(A0-A11)

CAS Latency =3

Burst Length = 4

Bank0

BS(A12/A13)

Bank0

Active

Column=A

Read

Column=B

Read

Dout

out B1

out B2

out B3

out A0

out B0

READ

2. Same bank, different ROW address:

When the ROW address changes on same bank,

consecutive read commands cannot be executed;

it is necessary to separate the two read commands

with a Precharge command and a bank-active

command.

3. Different bank:

When the bank changes, the second read can be

performed after an interval of no less than 1

cycle, provided that the other bank is in the bank-

active state. Even when the first command is a

burst read that is not yet finished, the data read

by the second command will be valid.

Row

Column A Column B

Column=A

Dout

Column=B

Dout

READ

24

ACTV

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GM72V66841CT Datasheet(PDF) 25 Page - LG Semicon Co.,Ltd.

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