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MSP430FR2111IRLLR Datasheet(PDF) 42 Page - Texas Instruments |
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MSP430FR2111IRLLR Datasheet(HTML) 42 Page - Texas Instruments |
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42 / 75 page  42 MSP430FR2111, MSP430FR2110 SLASE78A – AUGUST 2016 – REVISED AUGUST 2016 www.ti.com Submit Documentation Feedback Product Folder Links: MSP430FR2111 MSP430FR2110 Detailed Description Copyright © 2016, Texas Instruments Incorporated (1) This is the remapped functionality controlled by the USCIARMP bit in the SYSCFG3 register. Only one selected port is valid at the same time when TB0 acts as capture input functionality. TB0 PWM outputs regardless of this remap bit control. 6.11.6 Cyclic Redundancy Check (CRC) The 16-bit CRC module produces a signature based on a sequence of data values and can be used for data checking purposes. The CRC generation polynomial is compliant with CRC-16-CCITT standard of x16 + x12 + x5 + 1. 6.11.7 Enhanced Universal Serial Communication Interface (eUSCI_A0) The eUSCI modules are used for serial data communications. The eUSCI_A module supports either UART or SPI communications. Additionally, eUSCI_A supports automatic baud-rate detection and IrDA. Table 6-11. eUSCI Pin Configurations eUSCI_A0 PIN (USCIARMP = 0) UART SPI P1.7 TXD SIMO P1.6 RXD SOMI P1.5 SCLK P1.4 STE PIN (USCIARMP = 1) UART SPI P1.3(1) TXD SIMO P1.2(1) RXD SOMI P1.1(1) SCLK P1.0(1) STE |
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