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TMS320C17 Datasheet(PDF) 3 Page - Texas Instruments |
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TMS320C17 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 149 page  SPRS009C – JANUARY 1987 – REVISED JULY 1991 TMS320C1x DIGITAL SIGNAL PROCESSORS POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 3 description TMS320C10 The ′C10 provides the core CPU used in all other ′C1x devices. Its microprocessor operates at 5 MIPS. It provides a parallel I/O of 8 × 16 bits. Three versions with cycle times of 160, 200, and 280 ns are available as illustrated in Table 1. The ′C10 versions are offered in plastic 40-pin DIP or a 44-lead PLCC packages. TMS320C14/E14/P14 The ′C14/E14/P14 devices, using the ′C10 core CPU, offer expanded on-chip RAM, and ROM or EPROM ( ′E14/P14), 16 pins of bit selectable parallel I/O, an I/O mapped asynchronous serial port, four 16-bit timers, and external/internal interrupts. The ′C14 devices can provide for microcomputer/microprocessor operating modes. Three versions with cycle times of 160-ns are available as illustrated in Table 1. These devices are offered in 68-pin plastic PLCC or ceramic CER-QUAD packages. TMS320C15/E15/P15 The ′C15/E15/P15 devices are a version of the ′C10, offering expanded on-chip RAM, and ROM or EPROM ( ′E15/P15). The ′P15 is a one-time programmable (OTP), windowless EPROM version. These devices can operate in the microcomputer or microprocessor modes. Five versions are available with cycle times of 160 to 200 ns (see Table 1). These devices are offered in 40-pin DIP, 44-pin PLCC, or 44-pin ceramic packages. TMS320LC15 The ′LC15 is a low-power version of the ′C15, utilizing a VDD of only 3.3-V. This feature results in a 2.3: 1 power requirement reduction over the typical 5-V ′C1x device. It operates at a cycle time of 250 ns. The device is offered in 40-pin DIP or 44-lead PLCC packages. TMS320C16 The ′C16 offers on-chip RAM of 256-words, an expanded program memory of 64K-words, and a fast instruction cycle time of 114 ns (8.77 MIPS). It is offered in a 64-pin quad flat-pack package. TMS320C17/E17/P17 The ′C17/E17/P17 versions consist of five major functional units: the ′C15 microcomputer, a system control register, a full-duplex dual channel serial port, µ-law/A-law companding hardware, and a coprocessor port. The dual-channel serial port is capable of full-duplex serial communication and offers direct interface to two combo-codecs. The hardware companding logic can operate in either µ-law or A-law format with either sign-magnitude or twos complement numbers in either serial or parallel modes. The coprocessor port allows the ′C17/E17/P17 to act as a slave microcomputer or as a master to a peripheral microcomputer. The ′P17 utilizes a one-time programmable (OTP) windowless EPROM version of the ′E17. TMS320LC17 The ′LC17 is a low-power version of the ′C17, utilizing a VDD of only 3.3-V. This feature results in a 2.3: 1 power requirement reduction over the typical 5-V ′C1x device. It operates at a cycle time of 278 ns. |
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