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AD7490BRU Datasheet(PDF) 13 Page - Analog Devices |
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AD7490BRU Datasheet(HTML) 13 Page - Analog Devices |
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13 / 24 page  AD7490 –13– REV. A the on resistance of a switch (track and hold switch) and also includes the on resistance of the input multiplexer. The total resistance is typically about 400 Ω. The capacitor C2 is the ADC sampling capacitor and typically has a capacitance of 30 pF. For ac appli- cations, removing high frequency components from the analog input signal is recommended by use of an RC low-pass filter on the relevant analog input pin. In applications where harmonic distor- tion and signal-to-noise ratio are critical, the analog input should be driven from a low impedance source. Large source impedances will significantly affect the ac performance of the ADC. This may necessitate the use of an input buffer amplifier. The choice of the op amp will be a function of the particular application. When no amplifier is used to drive the analog input, the source impedance should be limited to low values. The maximum source impedance will depend on the amount of total harmonic distortion (THD) that can be tolerated. The THD will increase as the source impedance increases, and performance will degrade (see TPC 5). ADC TRANSFER FUNCTION The output coding of the AD7490 is either straight binary or twos complement depending on the status of the LSB (RANGE Bit) in the Control Register. The designed code transitions occur midway between successive LSB values (i.e., 1 LSB, 2 LSBs, and so on). The LSB size is equal to REFIN/4096. The ideal transfer charac- teristic for the AD7490 when straight binary coding is selected is shown in Figure 8. 000…000 0V ANALOG INPUT 111…111 000…001 000…010 111…110 • • 111…000 • 011…111 • • 1 LSB +VREF 1 LSB 1 LSB VREF/4096 VREF IS EITHER REFIN OR 2 REFIN Figure 8. Straight Binary Transfer Characteristic VREF R3 R2 R4 R1 REFIN VIN0 • • VIN15 AD7490 DSP/ P VDD 0.1 F V VDD VDRIVE DOUT TWOS COMPLEMENT +REFIN ( 2 REFIN) REFIN –REFIN ( 0V) 011…111 000…000 100…000 0V V R1 R2 R3 R4 Figure 10. Handling Bipolar Signals –VREF 1 LSB ANALOG INPUT +VREF 1 LSB 1 LSB 2 VREF 4096 VREF 1 LSB 100…000 011…111 100…001 100…010 011…110 • • 000…001 111…111 • • 000…000 Figure 9. Twos Complement Transfer Characteristic with REFIN ± REFIN Input Range Handling Bipolar Input Signals Figure 10 shows how useful the combination of the 2 REFIN input range and the twos complement output coding scheme is for handling bipolar input signals. If the bipolar input signal is biased about REFIN and twos complement output coding is selected, then REFIN becomes the zero code point, –REFIN is negative fullscale and +REFIN becomes positive full scale, with a dynamic range of 2 REFIN. TYPICAL CONNECTION DIAGRAM Figure 11 shows a typical connection diagram for the AD7490. In this setup, the AGND pin is connected to the analog ground plane of the system. In Figure 11, REFIN is connected to a decoupled 2.5 V supply from a reference source, the AD780, to provide an analog input range of 0 V to 2.5 V (if RANGE Bit is 1) or 0 V to 5V (if RANGE Bit is 0). Although the AD7490 is connected to a VDD of 5 V, the serial interface is connected to a 3 V micropro- cessor. The VDRIVE pin of the AD7490 is connected to the same 3V supply of the microprocessor to allow a 3 V logic interface (see Digital Inputs section.) The conversion result is output in a 16-bit word. This 16-bit data stream consists of four address bits indicating which channel the conversion result corresponds to, followed by the 12 bits of conversion data. For applications where |
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