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DS75451 Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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DS75451 Datasheet(HTML) 6 Page - National Semiconductor (TI) |
6 / 14 page ![]() DC Test Circuits (Continued) DS005824-21 Circuit Input Under Test Other Input Output Apply Measure DS75451 V IH V IH V OH I OL V IL V CC I OL V OL DS75452 V IH V IH I OL V OL V IL V CC V OH I OH DS75453 V IH Gnd V OH I OH V IL V IL I OL V OH FIGURE 7. V IH,VIL,IOH,VOL DS005824-22 Note A: Each input is tested separately. Note B: When testing DS75453 input not under test is grounded. For all other circuits it is at 4.5V. FIGURE 8. V I,VIL DS005824-23 Each input is tested separately. FIGURE 9. I I,IIH DS005824-24 Both gates are tested simultaneously. FIGURE 10. I CCH,ICCL for AND, NAND Circuits DS005824-25 Both gates are tested simultaneously. FIGURE 11. I CCH,ICCL for OR, NOR Circuits www.national.com 6 |