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MSP430FR5994 Datasheet(PDF) 67 Page - Texas Instruments |
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MSP430FR5994 Datasheet(HTML) 67 Page - Texas Instruments |
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67 / 166 page  67 MSP430FR5994, MSP430FR59941, MSP430FR5992, MSP430FR5964, MSP430FR5962 www.ti.com SLASE54 – MARCH 2016 Submit Documentation Feedback Product Folder Links: MSP430FR5994 MSP430FR59941 MSP430FR5992 MSP430FR5964 MSP430FR5962 Detailed Description Copyright © 2016, Texas Instruments Incorporated (1) Multiple source flags (2) A reset is generated if the CPU tries to fetch instructions from peripheral space. (3) (Non)maskable: the individual interrupt enable bit can disable an interrupt event, but the general interrupt enable cannot disable it. The vectors programmed into the address range from 0FFFFh to 0FFE0h are used as BSL password (if enabled by the corresponding signature). The signatures are at 0FF80h and extend to higher addresses. Signatures are evaluated during device start-up. Table 6-5 lists the device-specific signature locations. A JTAG password can be programmed starting at address 0FF88h and extending to higher addresses. The password can extend into the interrupt vector locations using the interrupt vector addresses as additional bits for the password. The length of the JTAG password depends on the JTAG signature. Refer to the chapter "System Resets, Interrupts, and Operating Modes, System Control Module (SYS)" in the MSP430FR58xx, MSP430FR59xx, MSP430FR68xx, MSP430FR69xx Family User's Guide (SLAU367) for details. Table 6-4. Interrupt Sources, Flags, and Vectors INTERRUPT SOURCE INTERRUPT FLAG SYSTEM INTERRUPT WORD ADDRESS PRIORITY System Reset Power up, brownout, supply supervisor External reset RST Watchdog time-out (watchdog mode) WDT, FRCTL MPU, CS, PMM password violation FRAM uncorrectable bit error detection MPU segment violation Software POR, BOR SVSHIFG PMMRSTIFG WDTIFG WDTPW, FRCTLPW, MPUPW, CSPW, PMMPW UBDIFG MPUSEGIIFG, MPUSEG1IFG, MPUSEG2IFG, MPUSEG3IFG PMMPORIFG, PMMBORIFG (SYSRSTIV)(1) (2) Reset 0FFFEh Highest System NMI Vacant memory access JTAG mailbox FRAM access time error FRAM write protection error FRAM bit error detection MPU segment violation VMAIFG JMBINIFG, JMBOUTIFG ACCTEIFG, WPIFG CBDIFG, UBDIFG MPUSEGIIFG, MPUSEG1IFG, MPUSEG2IFG, MPUSEG3IFG (SYSSNIV) (1) (3) (Non)maskable 0FFFCh User NMI External NMI Oscillator fault NMIIFG, OFIFG (SYSUNIV)(1) (3) (Non)maskable 0FFFAh Comparator_E CEIFG, CEIIFG (CEIV)(1) Maskable 0FFF8h TB0 TB0CCR0.CCIFG Maskable 0FFF6h TB0 TB0CCR1.CCIFG ... TB0CCR6.CCIFG, TB0CTL.TBIFG (TB0IV)(1) Maskable 0FFF4h Watchdog timer (interval timer mode) WDTIFG Maskable 0FFF2h eUSCI_A0 receive or transmit UCA0IFG: UCRXIFG, UCTXIFG (SPI mode) UCA0IFG: UCSTTIFG, UCTXCPTIFG, UCRXIFG, UCTXIFG (UART mode) (UCA0IV)(1) Maskable 0FFF0h eUSCI_B0 receive or transmit UCB0IFG: UCRXIFG, UCTXIFG (SPI mode) UCB0IFG: UCALIFG, UCNACKIFG, UCSTTIFG, UCSTPIFG, UCRXIFG0, UCTXIFG0, UCRXIFG1, UCTXIFG1, UCRXIFG2, UCTXIFG2, UCRXIFG3, UCTXIFG3, UCCNTIFG, UCBIT9IFG (I2C mode) (UCB0IV)(1) Maskable 0FFEEh |
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