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TMS320C6201GJL200 Datasheet(PDF) 4 Page - Texas Instruments |
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TMS320C6201GJL200 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 70 page TMS320C6201 FIXED-POINT DIGITAL SIGNAL PROCESSOR SPRS051H -- JANUARY 1997 -- REVISED MARCH 2004 4 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251--1443 functional and CPU (DSP core) block diagram Multichannel Buffered Serial Port 1 32 Direct Memory Access Controller (DMA) (4 Channels) Test C62x CPU (DSP Core) Data Path B B Register File Program Access/Cache Controller Instruction Fetch Instruction Dispatch Instruction Decode Data Path A A Register File PLL (x1, x4) Data Access Controller Power- Down Logic .L1 .S1 .M1 .D1 .D2 .M2 .S2 .L2 ROM/FLASH SRAM I/O Devices 32 Synchronous FIFOs I/O Devices Timer 0 Timer 1 External Memory Interface (EMIF) Multichannel Buffered Serial Port 0 Host Port Interface (HPI) Internal Program Memory (64K Bytes) Control Registers Control Logic Internal Data Memory (64K Bytes) In-Circuit Emulation Interrupt Control Framing Chips: H.100, MVIP, SCSA, T1, E1 AC97 Devices, SPI Devices, Codecs HOST CONNECTION Master /Slave TI PCI2040 Power PC 683xx 960 C6201 Digital Signal Processors Peripheral Control Bus Boot Configuration Interrupt Selector SBSRAM SDRAM |
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