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TNETV2685FIDZUTA11 Datasheet(PDF) 7 Page - Texas Instruments |
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TNETV2685FIDZUTA11 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 190 page TMS320DM647 TMS320DM648 www.ti.com SPRS372H – MAY 2007 – REVISED APRIL 2012 2 Device Overview 2.1 Device Characteristics Table 2-1, provides an overview of the DSP. The tables show significant features of the devices, including the capacity of on-chip RAM, the peripherals, the CPU frequency, and the package type with pin count. Table 2-1. Characteristics of the Processor HARDWARE FEATURES DM647 DM648 DDR2 memory controller (32-bit 1 1 bus width) [1.8 V I/O] 16-bit bus width synchronous/asynchronous 1 1 EMIF [EMIFA] EDMA3 (64 independent 1 1 channels, 8 QDMA channels) 4 64-bit General Purpose 4 64-bit General Purpose Timers (each configurable as 1 64-bit or 2 32- (each configurable as 1 64-bit or 2 32-bit) bit) UART (with RTS and CTS flow control) (with RTS and CTS flow control) I2C 1 (Master/Slave) 1 (Master/Slave) Peripherals Not all peripheral SPI 1 (4-wire, 2 chip select) 1 (4-wire, 2 chip select) pins are available McASP 1 (10 serializers) 1 (10 serializers) at the same time 3-port Ethernet Switch (For more detail, Subsystem supporting see Section 3.) 10/100/1000 Base-T 1 SGMII port available 2 SGMII ports available Management data input/output (MDIO) VLYNQ 1 1 General-purpose input/output Up to 32 pins Up to 32 pins port (GPIO) HPI (16/32-bit) 1 1 PCI (32 bit) (33 MHz or 66 1 (PCI33 or PCI66) 1 (PCI33 or PCI66) MHz) VIC 1 1 Configurable video ports 5 5 Size (bytes) 320KB RAM, 64KB ROM 576KB RAM, 64KB ROM 32KB L1 program (L1P)/cache (up to 32KB) 32KB L1 program (L1P)/cache (up to 32KB) 32KB L1 data (L1D)/cache (up to On-Chip Memory 32KB L1 data (L1D)/cache (up to 32KB) Organization 32KB) 512 KB unified mapped RAM/Cache (L2) 256KB unified mapped RAM/Cache 64KB Boot ROM (L2) 64KB Boot ROM Revision ID Register MegaModule (MM_REVID[15:0]) 0x0003 0x0003 Rev ID (address location 0x0181 2000) CPU ID + CPU Control Status Register 0x1000 0x1000 Rev ID (CSR.[31:16]) JTAGID register JTAG BSDL_ID 0x1B77 A02F 0x1B77 A02F (address location: 0x0204 9018) CPU Frequency MHz 720, 900, 1100 720, 800, 900, 1100 1.39 ns (-720) 1.39 ns (-720) 1.25 ns (-800) Cycle Time ns 1.11 ns (-900) 1.11 ns (-900) 0.91 ns (-1100) 0.91 ns (-1100) Core (V) 1.2 V (-720, -900, -1100) 1.2 V (-720, -800, -900, -1100) Voltage I/O (V) 1.8 V, 3.3 V 1.8 V, 3.3 V Copyright © 2007–2012, Texas Instruments Incorporated Device Overview 7 Submit Documentation Feedback Product Folder Link(s): TMS320DM647 TMS320DM648 |
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