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TPS73225 Datasheet(PDF) 13 Page - Texas Instruments

Part # TPS73225
Description  Cap-Free, NMOS, 250mA Low Dropout Regulator with Reverse Current Protection
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPS73225 Datasheet(HTML) 13 Page - Texas Instruments

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DROPOUT VOLTAGE
BOARD LAYOUT RECOMMENDATION TO
TRANSIENT RESPONSE
INTERNAL CURRENT LIMIT
SHUTDOWN
dV dt
+
V
OUT
C
OUT
80kW
(4)
TPS73201, TPS73215, TPS73216
TPS73218, TPS73225, TPS73230
TPS73233, TPS73250
SBVS037F – AUGUST 2003 – REVISED SEPTEMBER 2004
This noise reduction effect is shown as RMS Noise
Voltage vs CNR in the Typical Characteristics section.
The TPS732xx uses an NMOS pass transistor to
The TPS73201 adjustable version does not have the
achieve extremely low dropout. When (VIN - VOUT) is
noise-reduction pin available. However, connecting a
less than the dropout voltage (VDO), the NMOS pass
feedback capacitor, CFB, from the output to the FB pin
device is in its linear region of operation and the
will reduce output noise and improve load transient
input-to-output resistance is the RDS-ON of the NMOS
performance.
pass element.
The TPS732xx uses an internal charge pump to
For large step changes in load current, the TPS732xx
develop an internal supply voltage sufficient to drive
requires a larger voltage drop from VIN to VOUT to
the gate of the NMOS pass element above VOUT. The
avoid degraded transient response. The boundary of
charge pump generates ~250µV of switching noise at
this transient dropout region is approximately twice
~2MHz; however, charge-pump noise contribution is
the dc dropout. Values of VIN - VOUT above this line
negligible at the output of the regulator for most
insure normal transient response.
values of IOUT and COUT.
Operating in the transient dropout region can cause
an increase in recovery time. The time required to
recover from a load transient is a function of the
IMPROVE PSRR AND NOISE PERFORMANCE
magnitude of the change in load current rate, the rate
of change in load current, and the available head-
To improve ac performance such as PSRR, output
room (VIN to VOUT voltage drop). Under worst-case
noise, and transient response, it is recommended that
conditions [full-scale instantaneous load change with
the PCB be designed with separate ground planes for
(VIN - VOUT) close to dc dropout levels], the TPS732xx
VIN and VOUT, with each ground plane connected only
can take a couple of hundred microseconds to return
at the GND pin of the device. In addition, the ground
to the specified regulation accuracy.
connection for the bypass capacitor should connect
directly to the GND pin of the device.
The low open-loop output impedance provided by the
NMOS pass element in a voltage follower configur-
The TPS732xx internal current limit helps protect the
ation allows operation without an output capacitor for
regulator during fault conditions. Foldback helps to
many applications. As with any regulator, the addition
protect the regulator from damage during output
of a capacitor (nominal value 1µF) from the output pin
short-circuit conditions by reducing current limit when
to ground will reduce undershoot magnitude but
VOUT drops below 0.5V. See Figure 11 in the Typical
increase duration. In the adjustable version, the
Characteristics section for a graph of IOUT vs VOUT.
addition of a capacitor, CFB, from the output to the
adjust pin will also improve the transient response.
The TPS732xx does not have active pull-down when
The Enable pin is active high and is compatible with
the output is over-voltage. This allows applications
standard TTL-CMOS levels. VEN below 0.5V (max)
that connect higher voltage sources, such as alter-
turns the regulator off and drops the ground pin
nate power supplies, to the output. This also results
current to approximately 10nA. When shutdown capa-
in an output overshoot of several percent if the load
bility is not required, the Enable pin can be connected
current quickly drops to zero when a capacitor is
to VIN. When a pull-up resistor is used, and operation
connected to the output. The duration of overshoot
down to 1.8V is required, use pull-up resistor values
can be reduced by adding a load resistor. The
below 50 k
Ω.
overshoot decays at a rate determined by output
capacitor COUT and the internal/external load resist-
ance. The rate of decay is given by:
(Fixed voltage version)
13


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