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UC2845ADTRG4 Datasheet(PDF) 15 Page - Texas Instruments |
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UC2845ADTRG4 Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 45 page  IN(min) PS OUT V 2 85 V 2 N 10 V 12 V ´ ´ £ = » OUT C I f OUT OUT C 1.66 mF V 20% ³ » ´ ( ) BULK(min) OUT IN(min) V P 1 2 V IN 2 2 IN(min) BULK(min) LINE 2 0.25 arcsin C 180 µF 2 V V f h p ´ é ù æ ö ´ ´ + ´ ´ ç ÷ ê ú è ø ë û = » ´ - ´ ( ) BULK(min) OUT IN(min) V P 1 2 V INripple 2 2 IN(min) BULK(min) LINE 2 0.25 arcsin V 2 V V f h p ´ é ù æ ö ´ ´ + ´ ´ ç ÷ ê ú è ø ë û = ´ - ´ 15 UC1842A, UC1843A, UC1844A, UC1845A UC2842A, UC2843A, UC2844A, UC2845A UC3842A, UC3843A, UC3844A, UC3845A www.ti.com SLUS224E – SEPTEMBER 1994 – REVISED JULY 2016 Product Folder Links: UC1842A UC1843A UC1844A UC1845A UC2842A UC2843A UC2844A UC2845A UC3842A UC3843A UC3844A UC3845A Submit Documentation Feedback Copyright © 1994–2016, Texas Instruments Incorporated Typical Application (continued) 9.2.1 Design Requirements For this design example, use the parameters listed in Table 1 as the input parameters. Table 1. Design Parameters PARAMETER MIN TYP MAX UNIT INPUT CHARACTERISTICS VIN Input voltage (RMS) 85 265 V fLINE Line frequency 47 63 Hz OUTPUT CHARACTERISTICS VOUT Output voltage 11.75 12 12.25 V Output ripple voltage 50 mVPP IOUT Output current 4 4.33 A Load step 11.75 12.25 V SYSTEMS CHARACTERISTICS η Maximum load efficiency 86% 9.2.2 Detailed Design Procedure This application design procedure shows how to setup and use the UC2842A peak current mode controller in an offline flyback converter, with universal input to a 12-V, 48-W regulated output. Setting up and designing with the UC2842A peak current mode controller in a continuous mode flyback application requires knowing some things about the power stage. First, calculate the required input bulk capacitance (CIN) based on output power level (POUT), efficiency (ƞ), minimum input voltage (VIN(min)), line frequency (fLINE) and minimum bulk voltage. For this design example let VBULK(min) = 95 V. (2) (3) The output capacitor (COUT) is sized so the output voltage does not droop more than 10% during a large-signal transient response. The voltage-loop crossover frequency (fC) is estimated to be 2.5 kHz at this point in the design. (4) The COUT selected for the design is a 2200-µF capacitor, with an equivalent series resistance (ESR) of 45 mΩ. Next calculate the maximum primary to secondary turns ratio (NPS) of the transformer, based on the minimum input voltage and output voltage. (5) |
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