3

UCC1837

UCC2837

UCC3837

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

FET Driver

Peak Output Current

0.5

1.5

2.5

mA

Average Output Current

VOUT = 1V

25

100

175

µA

Max Output Voltage

µA

8.4

9.7

V

µA, 0°C to 70°C

8

9

V

µA, –55°C to 125°C

7.5

9

V

Charge Pump

CAP Voltage

VDD = 4.5V, C/S = 0V

11

12.5

V

VDD = 12V, C/S = 0V

15

16.5

V

Note 1: This is defined as the voltage on FB which results in a DC voltage of 8V on VOUT.

PIN DESCRIPTIONS

CAP: The output of the charge pump circuit. A capacitor

is connected between this pin and GND to provide a

floating bias voltage for an N-Channel MOSFET gate

drive. A minimum of a 0.01

µF ceramic capacitor is rec-

ommended. CAP can be directly connected to an exter-

nal regulated source such as +12V, in which case the

external voltage will be the source for driving the

N-Channel MOSFET.

COMP: The output of the transconductance error ampli-

fier and current sense amplifier. Used for compensating

the small signal characteristics of the voltage loop (and

current loop when Current Sense Amplifier is active in

over curret mode).

CS: The negative current sense input signal. This pin

should be connected through a low noise path to the low

side of the current sense resistor.

CT: The input to the duty cycle timer circuit. A capacitor

is connected from this pin to GND, setting the maximum

ON time of the over current protection circuits. See the

Application Section for programming instructions.

FB: The inverting terminal of the voltage error amplifier,

used to feedback the output voltage for comparison with

the internal reference voltage. The nominal DC operating

voltage at this pin is 1.5V

GND: Ground reference for the device. For accurate out-

put voltage regulation, GND should be referenced to the

output load ground.

VDD: The system input voltage is connected to this

point. VDD must be above 3V. VDD also acts as one

side of the Current Sense Amplifier and Comparator.

VOUT: This pin directly drives the gate of the external

N-MOSFET pass element. The typical output impedance

of this pin is 6.5k

Ω.

Topology and General Operation

Unitrode Application Note U-152 is a detailed design of a

low

dropout

linear

regulator

using

an

N-channel

MOSFET as a pass element, and should be used as a

guide for understanding the operation of the circuit

shown in Fig. 1.

Charge Pump Operation

The internal charge pump of the UCC3837 is designed to

create a voltage equal to 3 times the input VDD voltage

at the CAP pin. There is an internal 5V clamp at the input

of the charge pump however that insures the voltage at

CAP does not exceed the ratings of the IC. This CAP

voltage is used to provide gate drive current to the exter-

nal pass element as well as bias current to internal sec-

tions of the UCC3837 itself. The charge pump output has

a typical impedance of 80k

Ω and therefore the loading of

the IC and the external gate drive reduces the voltage

from its ideal level. The UCC3837 can operate in several

states including having the error amplifier disabled (shut

down), in normal linear regulation mode, and in overdrive

mode where the linear regulator is responding to a tran-

sient load or line condition. The maximum output voltage

available at VOUT is shown in Fig. 2 for these various

modes of operation.

The charge pump output is designed to supply 10

µAof

average current to the load which is typically the

MOSFET gate capacitance present at the VOUT pin.The

capacitor value used at CAP is chosen to provide holdup

APPLICATION INFORMATION