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UC3578DP Datasheet(PDF) 4 Page - Texas Instruments |
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UC3578DP Datasheet(HTML) 4 Page - Texas Instruments |
4 / 11 page 4 UC2578 UC3578 Current Limit The current sense pin provides overcurrent shutdown. As can be seen from the block diagram, the overcurrent comparator is wire ANDed with the oscillator after an in- ternally set blanking time. The ILIMIT threshold level is set by the current sense resistor from RSENSE. I V R LIMIT SENSE = 05 . An optional filter can be added (RSCS) from the current sense resistor to CS to provide high frequency filtering of the current sense signal if necessary. During a current limit condition, the soft start capacitor on SS is discharged until its voltage level reaches 1.2V. Dur- ing this time, a duty cycle clamp is activated to approxi- mately 0.6V above the voltage level on the SS capacitor. This condition persist until the SS capacitor is discharged to 1.2V, thus disabling the output driver. At this time, the SS capacitor is allowed to charge to 5V through the 50 µA current source and normal operation resumes when the SS capacitor reaches 5V. During the condition described, the regulator enters a hiccup current limit mode of opera- tion which limits the power dissipation in the MOSFET and output rectifier under a short circuit condition. Error Amplifier The onboard error amplifier of the UC3578 is a voltage amplifier with its non-inverting input tied to an internal 2V reference. As usual, loop compensation can be added from the inverting input of EAINV to the error amplifier output at EAOUT. Consideration must be given when choosing the values of the compensation components around the amplifier so that the output swing of the am- plifier is not restricted. The output of the amplifier can source 100 µA typically. General As in any buck converter, when the switch is off, the source flies low due to the conduction of the free-wheeling rectifier. The source (SRC) is pulled below ground by an amount determined by the forward voltage drop of the rectifier and by any transient voltage spike from inductance in this path. The occurrence of this con- dition could result in erratic operation of the IC during this period if the negative excursion is not limited. This is be- cause of conduction of current in the substrate of the IC due to the source pin being pulled below ground and for- ward biasing the internal substrate PN junction. To limit this effect, a small resistor (15 Ω) can be placed in series between the MOSFET source and the SRC pin as shown in Fig. 1. Too large a resistor will limit the drive to the Figure 1. Block diagram. APPLICATION INFORMATION (cont.) UDG-97006 Not Recommended for New Designs |
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