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TLK3132 Datasheet(PDF) 49 Page - Texas Instruments |
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TLK3132 Datasheet(HTML) 49 Page - Texas Instruments |
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49 / 104 page  TLK3132 www.ti.com SLLS956A – DECEMBER 2008 – REVISED DECEMBER 2009 Table 2-57. JC_TEST_CONTROL_1(1) ADDRESS: 0x9108 DEFAULT: 0x0000 BIT(s) NAME DESCRIPTION ACCESS 37128.15:12 REFCK_DIV_TST[3:0] Test bits for Reference divider RW 37128.11:8 FB_DIV_TST[3:0] Test bits for Feedback divider RW Test bits for TXRX output divider. Should be set to 4’b1010 when JC PLL is 37128.7:4 TXRX_DIV_TST[3:0] RW used 37128.3:2 RXBCLK_DIV_TST[1:0] Test bits for RXBYTECLK divider RW (1) This register value should be written 0x00A0 when JC PLL is used. Table 2-58. JC_TEST_CONTROL_2 ADDRESS: 0x9109 DEFAULT: 0x0000 BIT(s) NAME DESCRIPTION ACCESS 37129.15:14 DEL_DIV_TST[1:0] Test bits for Delay clock divider RW 37129.13:12 HSTL_DIV_TST[1:0] Test bits for HSTL VTP divider RW 37129.11:10 HSTL_DIV2_TST[1:0] Test bits for HSTL VTP 2X divider RW 37129.9:8 PFD_TST[1:0] Test bits for Phase frequency detector RW 37129.7:4 CP_TST[3:0] Test bits for Charge pump RW 37129.3:0 CP_BUF_TST[3:0] Test bits for Charge pump Buffer RW Table 2-59. JC_TI_TEST_CONTROL_1 ADDRESS: 0x9150 DEFAULT:0x0000 BIT(s) NAME DESCRIPTION ACCESS 37200.15:8 CML_BIAS_TST[7:0] Test bits for Bias generator for CML divider. For TI purposes only. RW 37200.7:4 CML_BIAS_CTRL[3:0] Control bits for Bias generator for CML divider. For TI purposes only. RW 37200.3 DIFFTX_ENTST Enable for TX clock out from SERDES REFCLK MUX. For TI purposes only. RW 37200.2 DIFFRX_ENTST Enable for RX clock out from SERDES REFCLK MUX. For TI purposes only. RW Table 2-60. JC_TI_TEST_CONTROL_2 ADDRESS: 0x9151 DEFAULT: 0x0000 BIT(s) NAME DESCRIPTION ACCESS 37201.15:13 VCO_FILCAP_CTRL[2:0] Control bits for VCO tail current noise filter. For TI purposes only. RW 37201.12:10 ANA_MUX_CTRL[2:0] Control bits to select the tested signals. For TI purposes only. RW Table 2-61. JC_TRIM_STATUS ADDRESS: 0x9152 DEFAULT: 0x0000 BIT(s) NAME DESCRIPTION ACCESS 37202.9:0 JC_TRIM[9:0] Jitter Cleaner Resistor Trim value RO Table 2-62. DIE_ID_7 ADDRESS: 0x9200 DEFAULT: 0x0000 BIT(s) NAME DESCRIPTION ACCESS 37376.15:0 Die ID [127:112] Bits [127:112] of the Die ID. Unique TI DIE identifier. RO Copyright © 2008–2009, Texas Instruments Incorporated Detailed Description 49 Submit Documentation Feedback Product Folder Link(s): TLK3132 |
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