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TLK3132 Datasheet(PDF) 41 Page - Texas Instruments |
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TLK3132 Datasheet(HTML) 41 Page - Texas Instruments |
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41 / 104 page  TLK3132 www.ti.com SLLS956A – DECEMBER 2008 – REVISED DECEMBER 2009 Table 2-35. SERDES_RX0_CONFIG (1) (continued) ADDRESS: 0x9002 DEFAULT: 0x0001 BIT(s) NAME DESCRIPTION ACCESS Receive Termination selection 00 = Common point connected to VDDT (For DC Coupled Systems) 36866.3:2 TERM 01 = Common point set to 0.8 VDDT (For AC Coupled Systems) RW 10 = Reserved 11 = Reserved 36866.1 ENTEST 1= Enables test modes specified in TESTCFG (Register 0x9012) RW 1 = Enables receiver 36866.0 ENRX RW 0 = Disables receiver Table 2-36. SERDES_RX1_CONFIG(1) ADDRESS: 0x9004 DEFAULT: 0x0001 BIT(s) NAME DESCRIPTION ACCESS Adaptive equalization control 0000 = Adaptive equalization disabled. Equalizer provides flat response at maximum gain. 36868.15:12 EQUALIZER RW 0001 = Full adaptive equalization 0010 to 1111 = Reserved 36868.11:9 CDR Clock data recovery algorithm selection RW 36868.8 INVPAIR 1 = Inverts polarity of RXP and RXN RW 00 = Loss of signal detection disabled 01 = Reserved 36868.7:6 LOS RW 10 = Loss of signal detection enabled with threshold in the range of 85-175 mVdfpp. 11 = Reserved. Receiver symbol alignment selection 00 = Alignment disabled. 01 = Comma alignment enabled 36868.5:4 ALIGN RW 10 = Symbol alignment will be performed by one bit position when this mode is selected (i.e ALIGN changes from 00 to 10) 11= Reserved Receive Termination selection 00 = Common point connected to VDDT (For DC Coupled Systems) 36868.3:2 TERM 01 = Common point set to 0.8 VDDT (For AC Coupled Systems) RW 10 = Reserved 11 = Reserved 36868.1 ENTEST 1= Enables test modes specified in TESTCFG (Register 0x9012) RW 1 = Enables receiver 36868.0 ENRX RW 0 = Disables receiver (1) These are SERDES receiver control bits for channel 1. Table 2-37. SERDES_TX0_CONFIG(1) ADDRESS: 0x900A DEFAULT: 0x0001 BIT(s) NAME DESCRIPTION ACCESS Transmitter Output swing control for SERDES transmitter. Refer to Table 2-40: Output Swing Control 36874.11:9 SWING RW If swing is set to 750mV or more, CM bit (36874.8) needs to be set to 1. If swing is set to 625 mV or less, CM bit (36874.8) needs to be set to 0. 1 = Applicable for SWING settings 750 mV or more. 36874.8 CM RW 0 = Applicable for SWING settings 625 mV or less. Transmitter Differential output De-emphasis control 36874.7:4 DE-EMPHASIS RW Refer to Table 2-39: Transmit De-emphasis Control Transmitter Polarity 1 = Inverted polarity. TXP considered negative data and TXN considered 36874.3 INVPAIR positive data RW 0 = Normal polarity. TXP considered positive data and TXN considered negative data (1) These are SERDES transmitter control bits for channel 0. Copyright © 2008–2009, Texas Instruments Incorporated Detailed Description 41 Submit Documentation Feedback Product Folder Link(s): TLK3132 |
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