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LP875484YFQR Datasheet(PDF) 6 Page - Texas Instruments |
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LP875484YFQR Datasheet(HTML) 6 Page - Texas Instruments |
6 / 53 page LP8754 SNVS861A – FEBRUARY 2014 – REVISED AUGUST 2014 www.ti.com 6.4 Thermal Information LP8754 THERMAL METRIC(1) YFQ UNIT 49 PINS RθJA Junction-to-ambient thermal resistance 49.2 RθJCtop Junction-to-case (top) thermal resistance 0.2 RθJB Junction-to-board thermal resistance 6.6 °C/W ψJT Junction-to-top characterization parameter 2.9 ψJB Junction-to-board characterization parameter 6.5 RθJCbot Junction-to-case (bottom) thermal resistance n/a (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 6.5 General Electrical Characteristics (1) (2) Limits apply over the full ambient temperature range -40°C ≤ TA ≤ 85°C, VVDDA5V = VVINBXX = 3.7 V, VVIOSYS = VNRST = 1.8 V, VOUT = 1.1 V, (unless otherwise noted). SYMBOL PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CURRENTS Shutdown supply current. Total current into power ISHDN VVIOSYS = 0 V, VNRST = 0 V 0.1 2 connections VDDA5V and VINBXX µA Standby mode supply current. Total current into power ISTBY VVIOSYS = 1.8 V, VNRST = 0 V 50 connections VDDA5V and VINBXX Low-power PFM Mode, no load, one core 130 µA Active mode current active consumption. Total current IActive PFM Mode, no load, one core active 400 µA into power connections Forced PWM Mode, no load, one core VDDA5V and VINBXX 14.5 mA active LOGIC AND CONTROL INPUTS SCLSYS, SDASYS, ADDR 0.3 x VIL Input low level VVIOSYS = 1.8 V to 3.3 V VVIOSYS VIH Input high level VVIOSYS = 1.8 V to 3.3 V 0.7 x VVIOSYS V Hysteresis of Schmitt trigger Vhys 0.1 x VVIOSYS inputs (SCLSYS, SDASYS) Ci Capacitance of pins See (3) 4 pF (1) All voltage values are with respect to network ground pin. (2) Minimum (Min) and Maximum (Max) limits are specified by design, test, or statistical analysis. Typical (Typ.) numbers are not ensured, but do represent the most likely norm. (3) Maximum capacitance of SCLSYS or SDASYS line is 8 pF, if ADDR pin is connected to line for serial bus address selection. 6 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: LP8754 |
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