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TLC5945 Datasheet(PDF) 16 Page - Texas Instruments |
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TLC5945 Datasheet(HTML) 16 Page - Texas Instruments |
16 / 30 page www.ti.com GS0.0 191 GS1.0 179 GS15.0 11 GS15.11 0 GS0.11 180 GS14.11 12 MSB LSB GSOUT15 GSOUT0 GSOUT14 − GSOUT1 tsu2 SCLK SOUT SIN MODE GS MSB 1 FollowingGSModeData InputCycle XLAT DC LSB 96 DCModeData InputCycle 192 GS LSB 193 GS+1 MSB 1 DCn LSB DC MSB GS MSB SID MSB SID MSB−1 FirstGSModeData InputCycle AfterDCDataInputCycle 192 SIDn+1 MSB GSn+1 LSB th3 tsu3 th1 th2 tsu1 twh2 th3 X X SID LSB tpd0 STATUS INFORMATION OUTPUT TLC5945 SLVS755 – MARCH 2007 n = 0 to 15 Grayscale data for all OUTn The input shift register enters grayscale data into the grayscale register for all channels simultaneously. The complete grayscale data format consists of 16 x 12 bit words, which forms a 192-bit wide data packet (see Figure 11). The data packet must be clocked in with the MSB first. Figure 11. Grayscale Data Packet Format When MODE is set to GND, the TLC5945 enters the grayscale data input mode. The device switches the input shift register to 192-bit width. After all data is clocked in, a rising edge of the XLAT signal latches the data into the grayscale register (see Figure 12). New grayscale data immediately becomes valid at the rising edge of the XLAT signal; therefore, new grayscale data should be latched at the end of a grayscale cycle when BLANK is high. The first GS data input cycle after dot correction requires an additional SCLK pulse after the XLAT signal to complete the grayscale update cycle. All GS data in the input shift register is replaced with status information data (SID) after updating the grayscale register. Figure 12. Grayscale Data Input Timing Chart The TLC5945 does have a status information register, which can be accessed in grayscale mode (MODE = GND). After the XLAT signal latches the data into the GS register, the input shift register data is replaced with status information data (SID) of the device (see Figure 12). LOD, TEF, and dot-correction register data can be read out at the SOUT pin. The status information data packet is 192 bits wide. Bits 0 – 15 contain the LOD status of each channel. Bit 16 contains the TEF status. Bits 24 – 119 contain the data of the dot-correction register. The remaining bits are reserved. The complete status information data packet is shown in Figure 13. SOUT outputs the MSB of the SID at the same time the SID are stored in the SID register, as shown in 16 Submit Documentation Feedback |
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