CY7C460A/CY7C462A
CY7C464A/CY7C466A
Document #: 38-06011 Rev. *A
Page 8 of 15
Architecture
Resetting the FIFO
Upon power-up, the FIFO must be reset with a master reset
(MR) cycle. This causes the FIFO to enter the empty condition
signified by the Empty flag (EF) being LOW, and both the Half
Full (HF), and Full flags (FF) being HIGH. Read (R) and Write
(W) must be HIGH tRPW/tWPW before and tRMR after the rising
edge of MR for a valid reset cycle. If reading from the FIFO
after a reset cycle is attempted, the outputs will all be in the
high-impedance state.
Writing Data to the FIFO
The availability of at least one empty location is indicated by a
HIGH FF. The falling edge of W initiates a write cycle. Data
appearing at the inputs (D0−D8) tSD before and tHD after the
rising edge of W will be stored sequentially in the FIFO.
The EF LOW-to-HIGH transition occurs tWEF after the first
LOW-to-HIGH transition of W for an empty FIFO. HF goes
LOW tWHF after the falling edge of W following the FIFO actu-
ally being half full. Therefore, the HF is active once the FIFO
is filled to half its capacity plus one word. HF will remain LOW
while less than one half of total memory is available for writing.
The LOW-to-HIGH transition of HF occurs tRHF after the rising
edge of R when the FIFO goes from half full +1 to half full. HF
is available in standalone and width expansion modes. FF
goes LOW tWFF after the falling edge of W, during the cycle in
which the last available location is filled. Internal logic prevents
overrunning a full FIFO. Writes to a full FIFO are ignored and
the write pointer is not incremented. FF goes HIGH tRFF after
a read from a full FIFO.
Reading Data from the FIFO
The falling edge of R initiates a read cycle if the EF is not LOW.
Data outputs (Q0−Q8) are in a high-impedance condition be-
tween read operations (R HIGH), when the FIFO is empty, or
when the FIFO is not the active device in the depth expansion
mode.
When one word is in the FIFO, the falling edge of R initiates a
HIGH-to-LOW transition of EF. When the FIFO is empty, the
outputs are in a high-impedance state. Reads to an empty
FIFO are ignored and do not increment the read pointer. From
the empty condition, the FIFO can be read tWEF after a valid
write.
Retransmit
The retransmit feature is beneficial when transferring packets
of data. It enables the receipt of data to be acknowledged by
the receiver and retransmitted if necessary. The retransmit
(RT) input is active in the standalone and width expansion
modes. The retransmit feature is intended for use when a
Note:
13. Expansion out of device 1 (XO1) is connected to expansion in of device 2 (XI2).
Switching Waveforms[7] (continued)
Expansion TimingDiagrams
C460A–15
R
W
XO1(XI2)
D0−D 8
DATA VALID
DATA
DATA
VALID
VALID
t
XOL
tHD
tSD
tSD
tHD
tXOL
tLZR
tA
tDVR
tA
tDVR
tHZR
XO1(XI2)
Q0 −Q8
C460A–16
tWR
tRR
DATA VALID
t
XOH
tXOH
[13]
[13]
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