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TLC32044CFN Datasheet(PDF) 28 Page - Texas Instruments

Part No. TLC32044CFN
Description  VOICE-BAND ANALOG INTERFACE CIRCUITS
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Maker  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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TLC32044CFN Datasheet(HTML) 28 Page - Texas Instruments

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TLC32044C, TLC32044E, TLC32044I, TLC32044M, TLC32045C, TLC32045I
VOICE-BAND ANALOG INTERFACE CIRCUITS
SLAS017F − MARCH 1988 − REVISED MAY 1995
28
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Table 3. Gain Control Table (Analog Input Signal Required for Full-Scale A/D Conversion)
INPUT CONFIGURATIONS
CONTROL REGISTER
BITS
ANALOG INPUT
A/D
CONVERSION
INPUT CONFIGURATIONS
d6
d7
ANALOG INPUT
CONVERSION
RESULT
Differential configuration
1
1
±6 V
Full - scale
Differential configuration
Analog input = IN + − IN −
0
0
±6 V
Full - scale
Analog input = IN + − IN −
= AUX IN + − AUX IN −
1
0
±3 V
Full - scale
= AUX IN + − AUX IN −
0
1
±1.5 V
Full - scale
Single-ended configuration
1
1
±3 V
Half - scale
Single-ended configuration
Analog input = IN + − ANLG GND
0
0
±3 V
Half - scale
Analog input = IN + − ANLG GND
= AUX IN + − ANLG GND
1
0
±3 V
Full - s ale
= AUX IN + − ANLG GND
0
1
±1.5 V
Full - scale
In this example, Vref is assumed to be 3 V. In order to minimize distortion, it is recommended that the analog
input not exceed 0.1 dB below full scale.
Figure 7. IN + and IN − Gain Control Circuitry
+
+
Rfb
Rfb
R
R
IN +
IN −
To Multiplexer
Rfb = R for d6 = 1, d7 = 1
d6 = 0, d7 = 0
Rfb = 2R for d6 = 1, d7 = 0
Rfb = 4R for d6 = 0, d7 = 1
Figure 8. AUX IN + and AUX IN −
Gain Control Circuitry
+
+
Rfb
Rfb
R
R
AUX IN +
AUX IN −
Rfb = R for d6 = 1, d7 = 1
d6 = 0, d7 = 0
Rfb = 2R for d6 = 1, d7 = 0
Rfb = 4R for d6 = 0, d7 = 1
To Multiplexer
(sin x) / x correction
The AIC does not have (sin x)/x correction circuitry after the digital-to-analog converter. (Sin x)/x correction can
be accomplished easily and efficiently in digital signal processor (DSP) software. Excellent correction accuracy
can be achieved to a band edge of 3000 Hz by using a first-order digital correction filter. The results, which are
shown in Table 4, are typical of the numerical correction accuracy that can be achieved for sample rates of
interest. The filter requires only seven instruction cycles per sample on the TMS(SMJ)320 DSPs. With a 200-ns
instruction cycle, nine instructions per sample represents an overhead factor of 1.4% and 1.7% for sampling
rates of 8000 Hz and 9600 Hz, respectively. This correction adds a slight amount of group delay at the upper
edge of the 300 −3000-Hz band.


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