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TLC34076 Datasheet(PDF) 43 Page - Texas Instruments |
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TLC34076 Datasheet(HTML) 43 Page - Texas Instruments |
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43 / 69 page  2–27 Figure 2–12 is a schematic of the internal comparator circuitry for the analog comparison test. + – IOR or IOG IOB or 145 mV Blank (Internal Signal) D C D3 Q Figure 2–12. Internal Comparator Circuitry for Analog Test The result of the analog comparison is strobed into bit D3 at the falling edge of an internal signal derived from the input BLANK signal. In order to have stable inputs to the comparator, the DAC should be set to a constant level between syncs. For normal operation, the data flow check, and the screen integrity test, bits D7 – D4 must be set to 0. |
Similar Part No. - TLC34076_16 |
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Similar Description - TLC34076_16 |
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