TLC2932

HIGH-PERFORMANCE PHASE-LOCKED LOOP

SLAS097E – SEPTEMBER 1994 – REVISED MAY 1997

22

POST OFFICE BOX 655303

APPLICATION INFORMATION

1/2 fosc

Phase

Comparator

AGND

DGND

DGND

DGND

REF IN

DVDD

AVDD

VDD

LOGIC VDD (Digital)

LOGIC GND (Digital)

SELECT

FIN – A

VCO INHIBIT

PFD INHIBIT

NC

VCO GND

VCO IN

BIAS

VCO VDD

VCO

R1†

R3

C1

R2

C2

R4

R5

R6

S3

S4

S5

Divide

By

N

0.22

µF

1

2

3

4

5

6

7

14

13

12

11

10

9

8

FIN – B

† RBIAS resistor

VCO OUT

PFD OUT

Figure 28. Evaluation and Operation Schematic

PCB layout considerations

The TLC2932 contains a high frequency analog oscillator; therefore, very careful breadboarding and

printed-circuit-board (PCB) layout is required for evaluation.

The following design recommendations benefit the TLC2932 user:

reduce system noise.

process.

and resistance. The ground plane is the better choice for noise reduction.

available in the system to minimize supply cross-coupling.

as possible to the appropriate device terminals.