Electronic Components Datasheet Search |
|
IDT821024PP Datasheet(PDF) 11 Page - Integrated Device Technology |
|
IDT821024PP Datasheet(HTML) 11 Page - Integrated Device Technology |
11 / 13 page 11 INDUSTRIAL TEMPERATURE RANGE IDT821024 QUAD NON-PROGRAMMABLE PCM CODEC TIMING CHARACTERISTICS Clock Parameter Description Min Typ Max Units Test Conditions t1 PCLK Duty Cycle 40 60 % PCLK=512kHz to 8.192MHz t2 PCLK Rise and Fall Time 25 ns PCLK=512kHz to 8.192MHz t3 MCLK Duty Cycle 40 60 % MCLK=2.048Hz,4.096MHz or 8.192MHz t4 MCLK Rise and Fall Time 15 ns MCLK=2.048Hz,4.096MHz or 8.192MHz t5 PCLK Clock Period 244 ns PCLK=512kHz to 8.192MHz Transmit Parameter Description Min Typ Max Units Test Conditions t11 Data Output Delay Time (for Short Frame Sync Mode) 5 70 ns t12 Data Hold Time 5 70 ns t13 Data Delay to High-Z 50 220 t5+70 ns t14 Frame sync Hold Time 50 ns t15 Frame sync High Setup Time 55 t5-50 ns t16 TSC Enable Delay Time(for Short Frame Sync Mode) 5 80 ns t17 TSC Disable Delay Time 50 220 t5+70 ns t18 Data Output Delay Time(for Long Frame Sync Mode) 5 40 ns t19 TSC Enable Delay Time(for Long Frame Sync Mode) 5 40 ns t21 Receive Data Setup Time 25 ns t22 Receive Data Hold Time 5 ns Figure 2. MCLK Timing Note: Timing parameter t13 is referenced to a high-impedance state. MCLK t4 t4 |
Similar Part No. - IDT821024PP |
|
Similar Description - IDT821024PP |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |