CY7C133 datasheet(8/13 Pages) CYPRESS

Part #	CY7C133

Description	2K x 16 Dual-Port Static RAM

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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8 / 13 page

CY7C133

CY7C143

Document #: 38-06036 Rev. *B

Page 8 of 13

Switching Waveforms

Read Cycle No.1 [21, 22]

Read Cycle No. 2 [21, 23]

Read Cycle No. 3 [22]

Note:

21. R/W is HIGH for read cycle.

22. Device is continuously selected, CE = VIL and OE = VIL.

23. Address valid prior to or coincidence with CE transition LOW.

tRC

tAA

tOHA

DATA VALID

PREVIOUS DATA VALID

DATA OUT

ADDRESS

Either Port Address Access

tACE

tLZOE

tDOE

tHZOE

tHZCE

DATA VALID

DATA OUT

CE

OE

tLZCE

tPU

ICC

ISB

tPD

Either Port CE/OE Access

tBHA

tBDD

VALID

tDDD

tWDD

ADDRESS MATCH

R/WR

ADDRESS R

DINR

ADDRESS L

BUSYL

DOUTL

tPS

tBLA

Read with BUSY (for master CY7C133)

tRC

tPWE

VALID

tHD

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