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TVP5146PFP Datasheet(PDF) 40 Page - Texas Instruments |
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TVP5146PFP Datasheet(HTML) 40 Page - Texas Instruments |
40 / 100 page 2−25 Table 2−11. Registers Summary (Continued) REGISTER NAME I2C SUBADDRESS DEFAULT R/W AGC increment speed 78h 05h R/W AGC increment delay 79h 1Eh R/W Reserved 7Ah−7Fh Chip ID MSB 80h R Chip ID LSB 81h R Reserved 82h−B0h VDP TTX filter 1 mask 1 B1h 00h R/W VDP TTX filter 1 mask 2 B2h 00h R/W VDP TTX filter 1 mask 3 B3h 00h R/W VDP TTX filter 1 mask 4 B4h 00h R/W VDP TTX filter 1 mask 5 B5h 00h R/W VDP TTX filter 2 mask 1 B6h 00h R/W VDP TTX filter 2 mask 2 B7h 00h R/W VDP TTX filter 2 mask 3 B8h 00h R/W VDP TTX filter 2 mask 4 B9h 00h R/W VDP TTX filter 2 mask 5 BAh 00h R/W VDP TTX filter control BBh 00h R/W VDP FIFO word count BCh R VDP FIFO interrupt threshold BDh 80h R/W Reserved BEh VDP FIFO reset BFh 00h R/W VDP FIFO output control C0h 00h R/W VDP line number interrupt C1h 00h R/W VDP pixel alignment C2h−C3h 01Eh R/W Reserved C4h−D5h VDP line start D6h 06h R/W VDP line stop D7h 1Bh R/W VDP global line mode D8h FFh R/W VDP full field enable D9h 00h R/W VDP full field mode DAh FFh R/W Reserved DBh−DFh VBUS data access with no VBUS address increment E0h 00h R/W VBUS data access with VBUS address increment E1h 00h R/W FIFO read data E2h R Reserved E3h−E7h VBUS address access E8h−E9h 00 0000h R/W Reserved EBh−EFh 00h R/W Interrupt raw status 0 F0h R/W Interrupt raw status 1 F1h R/W R = Read only W = Write only R/W = Read and write NOTE: Register addresses not shown in the register map summary are reserved and must not be written to. |
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