 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TL3842BD Datasheet(PDF) 12 Page - Texas Instruments |
|
|
||||||||||||||||||||||||||||||
TL3842BD Datasheet(HTML) 12 Page - Texas Instruments |
|
|
12 / 24 page 
www.ti.com TIMING RESISTANCE vs FREQUENCY 100 1k 10k 100k 1M f − Frequency − Hz 100 40 10 4 1 VCC = 15 V TA = 25°C CT = 22 nF CT = 47 nF CT = 100 nF CT = 10 nF CT = 4.7 nF CT = 2.2 nF CT = 1 nF DEAD TIME vs TIMING CAPACITANCE 100 40 10 4 1 CT − Timing Capacitance − nF 100 40 10 4 1 0.4 0.1 VCC = 15 V RT ≥ 5 kΩ TA = 25°C Open-Loop Laboratory Test Fixture 2N2222 4.7 k Ω 1-k Ω Error Amplifier Adjust 4.7 k Ω 5 k Ω ISENSE Adjust RT 100 k Ω VCC 0.1 µF 0.1 µF REF VCC OUTPUT GND 1 k Ω, 1 W A CT TL284xB TL384xB ISENSE VREF RT/CT VFB COMP OUTPUT GND TL284xB, TL384xB HIGH-PERFORMANCE CURRENT-MODE PWM CONTROLLERS SLVS610B – AUGUST 2006 – REVISED JULY 2007 APPLICATION INFORMATION (continued) In the open-loop laboratory test fixture (see Figure 4), high peak currents associated with loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to the GND terminal in a single-point ground. The transistor and 5-k Ω potentiometer sample the oscillator waveform and apply an adjustable ramp to the ISENSE terminal. Figure 4. Open-Loop Laboratory Test Fixture 12 Submit Documentation Feedback |
|
English ▼
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
