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TL16C552FNRG4 Datasheet(PDF) 29 Page - Texas Instruments |
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TL16C552FNRG4 Datasheet(HTML) 29 Page - Texas Instruments |
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29 / 33 page 
TL16C552 DUAL ASYCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO SLLS102B − DECEMBER 1990 − REVISED MARCH 1996 29 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 PRINCIPLES OF OPERATION modem status register (MSR) (continued) Reading the MSR register clears the delta modem status indications but has no affect on the other status bits. For LSR and MSR, the setting of status bits is inhibited during status register read operations. When a status condition is generated during a read IOR operation, the status bit is not set until the trailing edge of the read. If a status bit is set during a read operation, and the same status condition occurs, that status bit is cleared at the trailing edge of the read instead of being set again. In the loop back mode, when modem status interrupts are enabled, the CTS, DSR, RI and DCD input terminals are ignored. However, a modem status interrupt can still be generated by writing to MCR3 − MCR0. Applications software should not write to the MSR. parallel port registers The TL16C552 parallel port can interface to the device to a Centronics-style printer interface. When chip select 2 (CS2) is low, the parallel port is selected. Table 12 shows the registers associated with this parallel port. The read or write function of the register is controlled by the state of the read (IOR) and write (IOW) terminal as shown. The read data register allows the microprocessor to read the information on the parallel bus. The read status register allows the microprocessor to read the status of the printer in the six most significant bits. The status bits are printer busy BSY, acknowledge (ACK) which is a handshake function, paper empty (PE), printer selected (SLCT), error (ERR) and printer interrupt (PRINT). The read control register allows the state of the control lines to be read. The write control register sets the state of the control lines. They are direction (DIR), interrupt enable (INT2 EN), select in (SLIN), initialize the printer (INIT), autofeed the paper (AFD), and strobe (STB), which informs the printer of the presence of a valid byte on the parallel bus. The write data register allows the microprocessor to write a byte to the parallel bus. The parallel port is completely compatible with the parallel port implementation used in the IBM serial parallel adaptor. Table 12. Parallel Port Registers REGISTER REGISTER BITS REGISTER BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Read Data PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0 Read Status BSY ACK PE SLCT ERR PRINT 1 1 Read Control 0 0 DIR INT2 EN SLIN INIT AFD STB Write Data PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0 Write Control 0 0 DIR INT2 EN SLIN INIT AFD STB Table 13. Parallel Port Register Select CONTROL TERMINALS REGISTER SELECTED IOR IOW CS2 A1 A0 REGISTER SELECTED L H L L L Read data L H L L H Read status L H L H L Read control L H L H H Invalid H L L L L Write data H L L L H Invalid H L L H L Write control H L L H H Invalid |
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