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TL16PNP550A Datasheet(PDF) 11 Page - Texas Instruments |
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TL16PNP550A Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 40 page  TL16PNP550A ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH PLUGANDPLAY (PnP) AND AUTOFLOW CONTROL SLLS190B − MARCH 1995 − REVISED MARCH 1996 11 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 system timing requirements over recommended ranges of supply voltage and operating free-air temperature PARAMETER ALTERNATE SYMBOL FIGURE TEST CONDITIONS MIN MAX UNIT tcR Cycle time, read (tw7 + td8 + td9) RC 87 ns tcW Cycle time, write (tw6 + td5 + td6) WC 87 ns tw1† Pulse duration, XIN high tXH Figure 5 f = 16 MHz maximum 25 ns tw2† Pulse duration, XIN low tXL Figure 5 f = 16 MHz maximum 25 ns tw6 Pulse duration, write strobe (IOW) tWR Figure 6 75 ns tw7 Pulse duration, read strobe (IOR) tRD Figure 7 75 ns tw8 Pulse duration, master reset tMR 1 µs tsu3 Setup time, data valid before IOW↑ tDS Figure 6 15 ns th1 Hold time, chip select (CS) valid after address (A0 − A2) becomes invalid tCH Figure 6, Figure 7 From the first rising edge of XIN after address invalid 20 ns th2 Hold time, data valid after IOW ↑ tDH Figure 6 5 ns td4 Delay time, chip select (CS) valid after address valid (A0 − A2) tCSRW Figure 6, Figure 7 From the first rising edge of XIN after address valid 30 ns td5 Delay time, address valid (A0 − A2) before IOW↓ tAW Figure 6 7 ns td6 Delay time, address valid (A0 − A2) before IOR↓ tAR Figure 7 7 ns td7 Delay time, chip select (CS) valid to data valid (D7 − D0) tCSVD Figure 7 CL = 75 pF 30 ns td8 Delay time, IOR↑ to floating data (D7 − D0) tHZ Figure 7 CL = 75 pF 20 ns td9 Delay time, EXINTR ↑ or EXINTR↓ to IRQx↑ or IRQx↓ Figure 8 15 ns † This only applies when PNPBYPASS is low. oscillator cell maximum switching characteristics, VCC = 4.75 V, TJ = 115°C PARAMETER FROM TO INTRINSIC DELAY DELTA DELAY DELAY (ns) PARAMETER FROM (INPUT) TO (OUTPUT) DELAY (ns) DELAY (ns/pF) CL = 15 pF CL = 50 pF CL = 85 pF CL = 100 pF tPLH XIN XOUT − 0.25 0.300 4.26 14.76 25.26 29.77 tPHL XIN XOUT − 0.24 0.206 2.85 10.06 17.27 20.36 tr Output rise time, XOUT 5.83 21.15 36.47 43.04 tf Output fall time, XOUT 3.76 13.50 23.24 27.41 baud generator switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 75 pF (see Figure 5) PARAMETER ALTERNATE SYMBOL TEST CONDITIONS MIN MAX UNIT tw3† Pulse duration, PNPS1 low tLW f = 16 MHz, CLK ÷ 2 50 ns tw4† Pulse duration, PNPS1 high tHW f = 16 MHz, CLK ÷ 2 50 ns td1† Delay time, XIN ↑ to PNPS1↑ tBLD 45 ns td2† Delay time, XIN ↑↓ to PNPS1↓ tBHD 45 ns † This only applies when PNPBYPASS is low. |
Similar Part No. - TL16PNP550A_08 |
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Similar Description - TL16PNP550A_08 |
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