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LMR14020QDPRTQ1 Datasheet(PDF) 11 Page - Texas Instruments |
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LMR14020QDPRTQ1 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 35 page OUT FBT FBB V 0.75 R R 0.75 u VOUT FB RFBT RFBB 11 LMR14020-Q1 www.ti.com SNVSAG4A – NOVEMBER 2015 – REVISED JULY 2016 Product Folder Links: LMR14020-Q1 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Feature Description (continued) 7.3.4 Low Dropout Operation and Bootstrap Voltage (BOOT) The LMR14020-Q1 provides an integrated bootstrap voltage regulator. A small capacitor between the BOOT and SW pins provides the gate drive voltage for the high-side MOSFET. The BOOT capacitor is refreshed when the high-side MOSFET is off and the external low side diode conducts. The recommended value of the BOOT capacitor is 0.1 μF. A ceramic capacitor with an X7R or X5R grade dielectric with a voltage rating of 16 V or greater is recommended for stable performance over temperature and voltage. When operating with a low voltage difference from input to output, the high-side MOSFET of the LMR14020-Q1 will operate at approximate 97% duty cycle. When the high-side MOSFET is continuously on for 5 or 6 switching cycles (5 or 6 switching cycles for frequency lower than 1 MHz, and 10 or 11 switching cycles for frequency higher than 1 MHz) and the voltage from BOOT to SW drops below 3.2 V, the high-side MOSFET is turned off and an integrated low side MOSFET pulls SW low to recharge the BOOT capacitor. Since the gate drive current sourced from the BOOT capacitor is small, the high-side MOSFET can remain on for many switching cycles before the MOSFET is turned off to refresh the capacitor. Thus the effective duty cycle of the switching regulator can be high, approaching 97%. The effective duty cycle of the converter during dropout is mainly influenced by the voltage drops across the power MOSFET, the inductor resistance, the low side diode voltage and the printed circuit board resistance. 7.3.5 Adjustable Output Voltage The internal voltage reference produces a precise 0.75 V (typical) voltage reference over the operating temperature range. The output voltage is set by a resistor divider from output voltage to the FB pin. It is recommended to use 1% tolerance or better and temperature coefficient of 100 ppm or less divider resistors. Select the low side resistor RFBB for the desired divider current and use Equation 1 to calculate high-side RFBT. Larger value divider resistors are good for efficiency at light load. However, if the values are too high, the regulator will be more susceptible to noise and voltage errors from the FB input current may become noticeable. RFBB in the range from 10 kΩ to 100 kΩ is recommended for most applications. Figure 14. Output Voltage Setting (1) 7.3.6 Enable and Adjustable Under-voltage Lockout The LMR14020-Q1 is enabled when the VIN pin voltage rises above 3.7 V (typical) and the EN pin voltage exceeds the enable threshold of 1.2 V (typical). The LMR14020-Q1 is disabled when the VIN pin voltage falls below 3.42 V (typical) or when the EN pin voltage is below 1.2 V. The EN pin has an internal pull-up current source (typically IEN = 1 μA) that enables operation of the LMR14020-Q1 when the EN pin is floating. Many applications will benefit from the employment of an enable divider RENT and RENB in Figure 15 to establish a precision system UVLO level for the stage. System UVLO can be used for supplies operating from utility power as well as battery power. It can be used for sequencing, ensuring reliable operation, or supply protection, such as a battery. An external logic signal can also be used to drive EN input for system sequencing and protection. When EN terminal voltage exceeds 1.2 V, an additional hysteresis current (typically IHYS = 3.6 μA) is sourced out of EN terminal. When the EN terminal is pulled below 1.2 V, IHYS current is removed. This additional current facilitates adjustable input voltage UVLO hysteresis. Use Equation 2 and Equation 3 to calculate RENT and RENB for desired UVLO hysteresis voltage. |
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