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LMR14020SDDA Datasheet(PDF) 11 Page - Texas Instruments |
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LMR14020SDDA Datasheet(HTML) 11 Page - Texas Instruments |
11 / 30 page S T 1.045 W ¦ N+] R (k ) 32537 : u SS REF SS SS C (nF) V (V) t (ms) I ( A) K 2 EN ENB START EN EN ENT V R V V I R START STOP ENT HYS V V R I VIN EN RENT RENB VIN VEN IEN IEN_HYS LMR14020 www.ti.com SNVSAA5A – FEBRUARY 2015 – REVISED APRIL 2015 Feature Description (continued) Figure 15. System UVLO By Enable Dividers (2) (3) where VSTART is the desired voltage threshold to enable LMR14020, VSTOP is the desired voltage threshold to disable device. 8.3.7 External Soft-start The LMR14020 has soft-start pin for programmable output ramp up time. The soft-start feature is used to prevent inrush current impacting the LMR14020 and its load when power is first applied. The soft-start time can be programed by connecting an external capacitor CSS from SS pin to GND. An internal current source (typically ISS = 3 μA) charges CSS and generates a ramp from 0 V to VREF. The soft-start time can be calculated by Equation 4: (4) The internal soft-start resets while device is disabled or in thermal shutdown. 8.3.8 Switching Frequency and Synchronization (RT/SYNC) The switching frequency of the LMR14020 can be programmed by the resistor RT from the RT/SYNC pin and GND pin. The RT/SYNC pin can’t be left floating or shorted to ground. To determine the timing resistance for a given switching frequency, use Equation 5 or the curve in Figure 16. Table 1 gives typical RT values for a given fSW. (5) Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: LMR14020 |
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