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TCA9539-Q1 Datasheet(PDF) 31 Page - Texas Instruments |
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TCA9539-Q1 Datasheet(HTML) 31 Page - Texas Instruments |
31 / 41 page POR V PORR V CC V PORF Time Time 31 TCA9539-Q1 www.ti.com SCPS254B – JANUARY 2014 – REVISED APRIL 2016 Product Folder Links: TCA9539-Q1 Submit Documentation Feedback Copyright © 2014–2016, Texas Instruments Incorporated VPOR is critical to the power-on reset. VPORR is the voltage level at which the reset condition is released and all the registers and the I2C/SMBus state machine are initialized to their default states. The value of VPOR differs based on the VCC being lowered to or from 0. Figure 38 and Table 8 provide more details on this specification. Figure 38. VPOR 11 Layout 11.1 Layout Guidelines For printed circuit board (PCB) layout of the TCA9539-Q1, common PCB layout practices must be followed but additional concerns related to high-speed data transfer such as matched impedances and differential pairs are not a concern for I2C signal speeds. In all PCB layouts, it is a best practice to avoid right angles in signal traces, to fan out signal traces away from each other upon leaving the vicinity of an integrated circuit (IC), and to use thicker trace widths to carry higher amounts of current that commonly pass through power and ground traces. By-pass and de-coupling capacitors are commonly used to control the voltage on the VCC pin, using a larger capacitor to provide additional power in the event of a short power supply glitch and a smaller capacitor to filter out high-frequency ripple. These capacitors must be placed as close to the TCA9539-Q1 as possible. These best practices are shown in Figure 39. For the layout example provided in Figure 39, it would be possible to fabricate a PCB with only 2 layers by using the top layer for signal routing and the bottom layer as a split plane for power (VCC) and ground (GND). However, a 4 layer board is preferable for boards with higher density signal routing. On a 4 layer PCB, it is common to route signals on the top and bottom layer, dedicate one internal layer to a ground plane, and dedicate the other internal layer to a power plane. In a board layout using planes or split planes for power and ground, vias are placed directly next to the surface mount component pad which must attach to VCC or GND and the via is connected electrically to the internal layer or the other side of the board. Vias are also used when a signal trace needs to be routed to the opposite side of the board, but this technique is not demonstrated in Figure 39. |
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