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SN74LV32ADR Datasheet(PDF) 1 Page - Texas Instruments |
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SN74LV32ADR Datasheet(HTML) 1 Page - Texas Instruments |
1 / 28 page A B Y Y + A ) B or Y + A • B Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN74LV32A SCLS385K – SEPTEMBER 1997 – REVISED DECEMBER 2014 SN74LV32A Quadruple 2-Input Positive-Or Gates 1 Features 2 Applications 1 • 2-V to 5.5-V VCC Operation • Printers • Max tpd of 6.5 ns at 5 V • E-Meters • Typical VOLP (Output Ground Bounce) • Motor Controls: Permanent Magnets < 0.8 V at VCC = 3.3 V, TA = 25°C • Servers and High Performance Computing • Typical VOHV (Output VOH Undershoot) • Automotive Infotainment > 2.3 V at VCC = 3.3 V, TA = 25°C 3 Description • Support Mixed-Mode Voltage Operation on All Ports This quadruple 2-input positive-OR gates is designed for 2-V to 5.5-V VCC operation. • Ioff Supports Partial-Power-Down Mode Operation • Latch-Up Performance Exceeds 250 mA Per The SN74LV32A device performs the Boolean JESD 17 function in positive logic. • ESD Protection Exceeds JESD 22 Device Information(1) – 2000-V Human-Body Model PART NUMBER PACKAGE BODY SIZE (NOM) – 200-V Machine Model TVSOP (14) 3.60 mm x 4.40 mm – 1000-V Charged-Device Model SOIC (14) 8.65 mm × 3.91 mm SN74LV32A VQFN (14) 3.50 mm x 3.50 mm SSOP (14) 6.20 mm x 5.30 mm TSSOP (14) 5.00 mm x 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 4 Simplified Schematic 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
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