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PCA9554ADGVR Datasheet(PDF) 1 Page - Texas Instruments |
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PCA9554ADGVR Datasheet(HTML) 1 Page - Texas Instruments |
1 / 40 page DB, DBQ, DGV, DW, OR PW PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 A0 A1 A2 P0 P1 P2 P3 GND VCC SDA SCL INT P7 P6 P5 P4 RGV PACKAGE (TOP VIEW) 16 6 8 2 10 P7 4 3 1 7 5 12 11 9 13 14 15 P6 INT SCL A2 P0 P1 P2 RGT PACKAGE (TOP VIEW) 16 6 8 2 10 P7 4 3 1 7 5 12 11 9 13 14 15 P6 INT SCL A2 P0 P1 P2 Product Folder Sample & Buy Technical Documents Tools & Software Support & Community PCA9554A SCPS127E – SEPTEMBER 2006 – REVISED JUNE 2014 PCA9554A Remote 8-Bit I2C and SMBus I/O Expander With Interrupt Output and Configuration Registers 1 Features 2 Description This 8-bit I/O expander for the two-line bidirectional 1 • I2C to Parallel Port Expander bus (I2C) is designed for 2.3-V to 5.5-V VCC • Open-Drain Active-Low Interrupt Output operation. It provides general-purpose remote I/O • Operating Power-Supply Voltage Range of 2.3 V expansion for most microcontroller families via the I2C to 5.5 V interface [serial clock (SCL), serial data (SDA)]. • 5-V Tolerant I/Os The PCA9554A consists of one 8-bit Configuration • 400-kHz Fast I2C Bus (input or output selection), Input, Output, and Polarity Inversion (active high or active low) registers. At • Three Hardware Address Pins Allow up to Eight power on, the I/Os are configured as inputs with a Devices on the I2C/SMBus weak pullup to VCC. However, the system master can • Input/Output Configuration Register enable the I/Os as either inputs or outputs by writing • Polarity Inversion Register to the I/O configuration bits. The data for each input or output is kept in the corresponding Input or Output • Internal Power-On Reset register. The polarity of the Input Port register can be • Power-Up With All Channels Configured as Inputs inverted with the Polarity Inversion register. All • No Glitch on Power Up registers can be read by the system master. • Latched Outputs With High-Current Drive The system master can reset the PCA9554A in the Maximum Capability for Directly Driving LEDs event of a timeout or other improper operation by • Latch-Up Performance Exceeds 100 mA Per utilizing the power-on reset feature, which puts the registers in their default state and initializes the JESD 78, Class II I2C/SMBus state machine. • ESD Protection Exceeds JESD 22 The PCA9554A open-drain interrupt (INT) output is – 2000-V Human-Body Model (A114-A) activated when any input state differs from its – 200-V Machine Model (A115-A) corresponding Input Port register state and is used to – 1000-V Charged-Device Model (C101) indicate to the system master that an input state has changed. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SSOP (16) 6.20 mm × 5.30 mm PCA9554A VQFN (16) 4.00 mm × 4.00 mm QFN (16) 3.00 mm × 3.00 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
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