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PI4IOE5V9536UE Datasheet(PDF) 6 Page - Pericom Semiconductor Corporation |
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PI4IOE5V9536UE Datasheet(HTML) 6 Page - Pericom Semiconductor Corporation |
6 / 12 page |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||| 2016-01-0028 PT0557-1 02/15/16 6 PI4IOE5V9536 4-bit I 2C-bus and SMBus low power I/O port ii.Register 0: input port registers This register is a read-only port. It reflects the incoming logic levels of the pins, regardless of whether the pin is defined as an input or an output by Register 2. Writes to this register have no effect. The default value ‘X’ is determined by the externally applied logic level. Table 6: Input port 0 register Bit 7 6 5 4 3 2 1 0 Symbol I7 I6 I5 I4 I3 I2 I1 I0 Default 1 1 1 1 X X X X iii. Register 1:Output port register This register is an output-only port. It reflects the outgoing logic levels of the pins defined as outputs by Registers 3. Bit values in this register have no effect on pins defined as inputs. In turn, reads from this register reflect the value that is in the flip-flop controlling the output selection, not the actual pin value. Table 8: Output port 0 register Bit 7 6 5 4 3 2 1 0 Symbol O7 O6 O5 O4 O3 O2 O1 O0 Default 1 1 1 1 1 1 1 1 iv. Register 2: Polarity inversion register This register allows the user to invert the polarity of the Input port register data. If a bit in this register is set (written with ‘1’), the Input port data polarity is inverted. If a bit in this register is cleared (written with a ‘0’), the Input port data polarity is retained. Table 10: Polarity Inversion port 0 register Bit 7 6 5 4 3 2 1 0 Symbol N7 N6 N5 N4 N3 N2 N1 N0 Default 0 0 0 0 0 0 0 0 v. Register 3: Configuration registers This register configures the directions of the I/O pins. If a bit in this register is set (written with ‘1’), the corresponding port pin is enabled as an input with high-impedance output driver. If a bit in this register is cleared (written with ‘0’), the corresponding port pin is enabled as an output. At reset, the I/Os are configured as inputs with a weak pull-up to VCC Table 12: Configuration port 0 register Bit 7 6 5 4 3 2 1 0 Symbol C7 C6 C5 C4 C3 C2 C1 C0 Default 1 1 1 1 1 1 1 1 |
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