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SN75LBC171DBG4 Datasheet(PDF) 5 Page - Texas Instruments |
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SN75LBC171DBG4 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 20 page SN65LBC171, SN75LBC171 TRIPLE DIFFERENTIAL TRANSCEIVERS SLLS460A – NOVEMBER 2000 – REVISED FEBRUARY 2001 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 RECEIVER SECTION electrical characteristics over recommended operating conditions PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIT+ Positive-going differential input voltage threshold 0.2 V VIT– Negative-going differential input voltage threshold –0.2 V Vhys Hysteresis voltage (VIT+ – VIT–) 40 mV VOH High-level output voltage VID = 200 mV, IOH = –8 mA, see Figure 10 4 4.7 VCC V VOL Low-level output voltage VID = –200 mV, IOL = –8 mA, see Figure 10 0 0.2 0.4 V II Line input current Other input=0V VI = 12 V 0.9 mA II Line input current Other input = 0 V VI = –7 V –0.7 mA II Input current RE –100 100 µA RI Input resistance A, B 12 k Ω ICC Supply current (receiver enabled) A, B, D open, RE, DE, and CDE at 0 V 16 mA † All typical values are at VCC = 5 V and TA = 25°C. switching characteristics over recommended operating conditions PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay time, low-to-high level output 7 16 ns tPHL Propagation delay time, high-to-low level output VID = 3Vto3V SeeFigure9 7 16 ns tr Receiver output rise time VID = –3 V to 3 V, See Figure 9 1.3 3 ns tf Receiver output fall time 1.3 3 ns tPZH Receiver output enable time to high level See Figure 10 26 40 ns tPHZ Receiver output disable time from high level See Figure 10 40 ns tPZL Receiver output enable time to low level See Figure 11 29 40 ns tPLZ Receiver output enable time to high level See Figure 11 40 ns tsk(p) Pulse skew (| ( tPLH – tPHL |) 2 ns tsk(o) Output skew} 1.5 ns tsk(pp) Part-to-part skeww 3 ns ‡ Output skew (tsk(o)) is the magnitude of the time delay difference between the outputs of a single device with all of the inputs connected together. § Part-to-part skew (tsk(pp)) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same input signals, the same supply voltages, at the same temperature, and have identical packages and test circuits. |
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