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LMH0395 Datasheet(PDF) 16 Page - Texas Instruments

Part # LMH0395
Description  3G HD/SD SDI Dual Output Low Power Extended Reach Adaptive Cable Equalizer
Download  33 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LMH0395 Datasheet(HTML) 16 Page - Texas Instruments

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SS
(host)
SCK
(host)
16xN clocks
Device N-1
Read Data
Device 1
Read Data
Device N
Read Data
MOSI
(host)
'21¶7&$5(
SPI Read Data
16xN clocks
³16x1´
³16x1´
³16x1´
Device N
Read Data
Device N-1
Read Data
Device 1
Read Data
SPI Read Data
MISO
(host)
A6 A5 A4 A3 A2 A1 A0
1
³8x1´
A6 A5 A4 A3 A2 A1
1
A0 D7 D6 D5 D4
D2 D1 D0
D3
SS
(host)
SCK
(host)
16xN clocks
Device N-1
Write Data
Device N-2
Write Data
Device N-3
Write Data
Device N
Write Data
MOSI (host)
MOSI Device 1
MISO Device 1
MOSI Device 2
'21¶7&$5(
Device 1
Write Data
Device N
Write Data
Device N-1
Write Data
Device N-2
Write Data
Device 2
Write Data
'21¶7&$5(
'21¶7&$5(
'21¶7&$5(
'21¶7&$5(
Device N
Write Data
MISO Device N-1
MOSI Device N
SPI Write Data
A6 A5 A4 A3 A2 A1
0
A0 D7 D6 D5 D4
D2 D1 D0
D3
LMH0395
SNLS323M – AUGUST 2010 – REVISED JULY 2015
www.ti.com
Programming (continued)
7.5.1.5 SPI Daisy-Chain Write
Figure 10 shows the SPI daisy-chain write for a daisy-chain of N devices. The SS signal is driven low and SCK is
toggled for 16xN clocks. The 16xN bit MOSI payload (sent to Device 1 in the daisy-chain) consists of the 16-bit
SPI write data for Device N (the last device in the chain), followed by the write data for Device –1, Device –2,
and so forth, ending with the write data for Device 1 (the first device in the chain). The 16-bit SPI write data for
each device consists of a “0” (write command), seven address bits, and eight data bits. After the SPI daisy-chain
write, SS must return high and then the write occurs for all devices in the daisy-chain.
Figure 10. SPI Daisy-Chain Write
7.5.1.6 SPI Daisy-Chain Read
Figure 11 shows the SPI daisy-chain read for a daisy-chain of N devices. The SPI daisy-chain read is 32xN bits
long, consisting of 16xN bits for the read transaction followed by 16xN bits for the dummy read transaction (all
“1”s) to shift out the read data on the MISO output. The SS signal is driven low and SCK is toggled for 16xN
clocks. The first 16xN bit MOSI payload (sent to Device 1 in the daisy-chain) consists of the 16-bit SPI read data
for Device N (the last device in the chain), followed by the read data for Device –1, Device –2, and so forth,
ending with the read data for Device 1 (the first device in the chain). The 16-bit SPI read data for each device
consists of a “1” (read command), seven address bits, and eight “1”s (which are ignored). After the first 16xN bit
transaction, SS must return high (to latch the data) and then is driven low again before the second 16xN bit
transaction of all “1”s is sent to the MOSI input. The requested read data is shifted out on MISO starting with the
data for Device N and ending with the data for Device 1. After this transaction, SS must return high.
Figure 11. SPI Daisy-Chain Read
16
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