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LMF100 Datasheet(PDF) 6 Page - Texas Instruments

Part # LMF100
Description  Dual High-Performance Switched Capacitor Filters
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LMF100 Datasheet(HTML) 6 Page - Texas Instruments

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Not Recommended for New Designs
LMF100
SNOSBG9B – JULY 1999 – REVISED JUNE 2015
www.ti.com
Electrical Characteristics for V
+ = +5 V and V= −5 V (continued)
The following specifications apply for Mode 1, Q = 10 (R1 = R3 = 100 k, R2 = 10 k), V
+ = +5 V and V= −5 V unless otherwise
specified. All limits are TA = TJ = 25°C unless otherwise specified.
LMF100CCN
LMF100CIWM
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
±30
±30
±80
Tested Limit
(1)
mV
SA/B = V
+
TMIN to TMAX
±80
Design Limit
(2)
TMIN to TMAX
±80
VOS2
DC Offset voltage
(4)
fCLK = 250 kHz
±15
±15
±70
Tested Limit
(1)
mV
SA/B = V
TMIN to TMAX
±70
Design Limit
(2)
TMIN to TMAX
±70
±15
±15
±40
Tested
VOS3
DC Offset voltage
(4)
fCLK = 250 kHz
Limit
(1)
mV
TMIN to TMAX
±60
Design
TMIN to TMAX
±60
Limit
(2)
Crosstalk
(5)
A Side to B Side or B Side to A Side
–60
–60
dB
fCLK = 250 kHz
N
40
40
Output noise
(6)
20 kHz Bandwidth
BP
320
320
µV
100:1 Mode
LP
300
300
Clock feedthrough
(7)
fCLK = 250 kHz 100:1 Mode
6
6
mV
4
4
−4.7
−4.7
±3.8
RL = 5 k
Tested
(All Outputs)
Limit
(1)
TMIN to TMAX
±3.7
VOUT
Minimum output voltage swing
V
Design
TMIN to TMAX
±3.7
Limit
(2)
RL = 3.5 k
3.9
3.9
(All Outputs)
−4.6
−4.6
GB
Operational amplifier gain BW
5
5
MHz
W
product
SR
Operational amplifier slew rate
20
20
V/µs
Source
All Outputs
12
12
mA
Maximum output,
Isc
Short circuit current
(8)
Sink
All Outputs
45
45
mA
Tested Limit
(1)
10
Input current on Pins: 4, 5, 6, 9,
IIN
µA
10, 11, 12, 16, 17
Design Limit
(2)
TMIN to TMAX
10
(5)
Crosstalk between the internal filter sections is measured by applying a 1 VRMS 10-kHz signal to one bandpass filter section input and
grounding the input of the other bandpass filter section. The crosstalk is the ratio between the output of the grounded filter section and
the 1 VRMS input signal of the other section.
(6)
In 50:1 mode the output noise is 3 dB higher.
(7)
In 50:1 mode the clock feed through is 6 dB higher.
(8)
The short circuit source current is measured by forcing the output that is being tested to its maximum positive voltage swing and then
shorting that output to the negative supply. The short circuit sink current is measured by forcing the output that is being tested to its
maximum negative voltage swing and then shorting that output to the positive supply. These are the worst case conditions.
6.6 Electrical Characteristics for V
+ = +2.5 V and V= −2.5 V
The following specifications apply for Mode 1, Q = 10 (R1 = R3 = 100 k, R2 = 10 k), V
+ = +2.50 V and V= −2.50 V unless
otherwise specified. All limits are TA = TJ = 25°C unless otherwise specified.
LMF100CCN
LMF100CIWM
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
8
8
12
12
Tested
fCLK = 250 kHz,
Is
Maximum supply current
Limit
(1)
mA
TMIN to TMAX
No Input Signal
Design
12
Limit
(2)
f0
Center frequency
0.1
50000
0.1
50000
Hz
(1)
Tested limits are specified to Texas Instruments AOQL (Average Outgoing Quality Level).
(2)
Design limits are specified to Texas Instruments AOQL (Average Outgoing Quality Level) but are not 100% tested.
6
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Copyright © 1999–2015, Texas Instruments Incorporated
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