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MT9V011P11ST Datasheet(PDF) 10 Page - Micron Technology |
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MT9V011P11ST Datasheet(HTML) 10 Page - Micron Technology |
10 / 33 page 1/4-INCH VGA CMOS ACTIVE-PIXEL DIGITAL IMAGE SENSOR Preliminary 09005aef80c6407f Micron Technology, Inc., reserves the right to change products or specifications without notice. MT9V011_external_DS_2.fm - Rev. A 8/04 EN 10 ©2004 Micron Technology, Inc. Frame Timing Formulas The constant 113 in the formulas in Table 3 is the constant value in default mode, when 8 dark columns are read out through Reg0x30. The constant follows the dark columns read out as shown in Table 4. Sensor timing is shown above in terms of pixel clock and master clock cycles (please refer to Figure 7). The recommended master clock frequency is 27 MHz. Table 4: Constant Value The vertical blanking and total frame time equa- tions assume that the number of integration rows (bits 11 through 0 of Reg0x09) is less than the number of active plus blanking rows (Reg0x03 + 1 + Reg0x06 + 1). If this is not the case, the number of integration rows must be used instead to determine the frame time, as shown in Table 5. Table 3: Frame Time PARAMETER NAME EQUATION DEFAULT TIMING AT 27 MHZ A Active Data Time (Reg0x04 + 1) x (Reg0x0A + 2) 640 pixel clocks = 1280 master = 47.4µs P Frame Start/End Blanking 6 x (Reg0x0A + 2) 6 pixel clocks = 12 master = 0.44µs Q Horizontal Blanking (113 + Reg0x05) x (Reg0x0A + 2) (minimum Reg0x05 value = 9) 244 pixel clocks = 488 master = 18.07µs A+Q Row Time (Reg0x04 + 1 + 113 + Reg0x05) x (Reg0x0A + 2) 884 pixel clocks = 1,768 master = 65.48µs V Vertical Blanking (Reg0x06 + 1) x (A + Q) + (Q - 2 x P) 25,868 pixel clocks = 51,736 master = 1.92ms Nrows x (A + Q) Frame Valid Time (Reg0x03 + 1) x (A + Q) - (Q - 2 x P) 424,088 pixel clocks = 848,176 master = 31.41ms F Total Frame Time (Reg0x03 + 1 + Reg0x06 + 1) x (A + Q) 449,956 pixel clocks = 899,912 master = 33.33ms REG 0X30, BIT 1:0 CONSTANT 1x 121 For 16 columns 01 113 For 8 columns 00 107 For no dark columns read, no row-wise noise correction applied Table 5: Frame Time - Master Clock PARAMETER NAME EQUATION (MASTER CLOCK) DEFAULT TIMING V’ Vertical Blanking (long integration time) (Reg0x09 - Reg0x03) x (A + Q) + (Q - 2 x P) 25,868 pixel clocks = 51,736 master = 1.92 ms F’ Total Frame Time (long integration time) (Reg0x09 + 1) x (A + Q) 449,956 pixel clocks = 899,912 master = 33.33ms |
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