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SN74LVCZ16240ADLR Datasheet(PDF) 1 Page - Texas Instruments |
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SN74LVCZ16240ADLR Datasheet(HTML) 1 Page - Texas Instruments |
1 / 11 page SN74LVCZ16240A 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS SCES276D – JUNE 1999 – REVISED AUGUST 2002 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Member of the Texas Instruments Widebus Family D Operates From 2.7 V to 3.6 V D Inputs Accept Voltages to 5.5 V D Max tpd of 4.2 ns at 3.3 V D Ioff and Power-Up 3-State Support Hot Insertion D Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC) D Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II D ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 1000-V Charged-Device Model (C101) description/ordering information This 16-bit buffer/driver is designed for 2.7-V to 3.6-V VCC operation. The SN74LVCZ16240A is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. This device provides inverting outputs. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. During power up or power down when VCC is between 0 and 1.5 V, the device is in the high-impedance state. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING SSOP DL Tube SN74LVCZ16240ADL LVCZ16240A 40 °Cto85°C SSOP – DL Tape and reel SN74LVCZ16240ADLR LVCZ16240A –40 °C to 85°C TSSOP – DGG Tape and reel SN74LVCZ16240ADGGR LVCZ16240A TVSOP – DGV Tape and reel SN74LVCZ16240ADGVR CW240A † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright 2002, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Widebus is a trademark of Texas Instruments. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1OE 1Y1 1Y2 GND 1Y3 1Y4 VCC 2Y1 2Y2 GND 2Y3 2Y4 3Y1 3Y2 GND 3Y3 3Y4 VCC 4Y1 4Y2 GND 4Y3 4Y4 4OE 2OE 1A1 1A2 GND 1A3 1A4 VCC 2A1 2A2 GND 2A3 2A4 3A1 3A2 GND 3A3 3A4 VCC 4A1 4A2 GND 4A3 4A4 3OE DGG, DGV, OR DL PACKAGE (TOP VIEW) |
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