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SN74LV08ADR Datasheet(PDF) 1 Page - Texas Instruments |
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SN74LV08ADR Datasheet(HTML) 1 Page - Texas Instruments |
1 / 28 page A B Y A B Y A B Y A B Y Y = A B or Y = A B • + Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN74LV08A SCLS387M – SEPTEMBER 1997 – REVISED OCTOBER 2014 SN74LV08A Quadruple 2-Input Positive-AND Gates 1 Features 2 Applications 1 • 2-V to 5.5-V VCC Operation • Servers • Max tpd of 7 ns at 5 V • Telecom Infrastructure • Typical VOLP (Output Ground Bounce) • PCs and Notebooks < 0.8 V at VCC = 3.3 V, TA = 25°C • TV Set-Top Boxes • Typical VOHV (Output VOH Undershoot) 3 Description > 2.3 V at VCC = 3.3 V, TA = 25°C This quadruple 2-input positive-AND gate is designed • Support Mixed-Mode Voltage Operation on for 2-V to 5.5-V VCC operation. The SN74LV08A All Ports device performs the Boolean function • Ioff Supports Live Insertion, Partial-Power-Down in positive logic. Mode, and Back-Drive Protection • Latch-Up Performance Exceeds 250 mA Device Information(1) Per JESD 17 PART NUMBER PACKAGE BODY SIZE (NOM) • ESD Protection Exceeds JESD 22 TVSOP (14) 3.60 mm × 4.40 mm – 2000-V Human-Body Model SOIC (14) 8.65 mm × 3.91 mm SN74LV08A VQFN (14) 3.50 mm× 3.50 mm – 200-V Machine Model SSOP (14) 6.20 mm × 5.30 mm – 1000-V Charged-Device Model TSSOP (14) 5.00 mm × 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 4 Simplified Schematic 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
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