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SN74LVCH16240ADLR Datasheet(PDF) 1 Page - Texas Instruments |
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SN74LVCH16240ADLR Datasheet(HTML) 1 Page - Texas Instruments |
1 / 12 page www.ti.com FEATURES 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1OE 1Y1 1Y2 GND 1Y3 1Y4 VCC 2Y1 2Y2 GND 2Y3 2Y4 3Y1 3Y2 GND 3Y3 3Y4 VCC 4Y1 4Y2 GND 4Y3 4Y4 4OE 2OE 1A1 1A2 GND 1A3 1A4 VCC 2A1 2A2 GND 2A3 2A4 3A1 3A2 GND 3A3 3A4 VCC 4A1 4A2 GND 4A3 4A4 3OE DGG OR DL PACKAGE (TOP VIEW) DESCRIPTION/ORDERING INFORMATION SN74LVCH16240A 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS SCAS566H – MARCH 1996 – REVISED MARCH 2005 • Member of the Texas Instruments Widebus™ Family • Operates From 1.65 V to 3.6 V • Inputs Accept Voltages to 5.5 V • Max tpd of 4.2 ns at 3.3 V • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C • Ioff Supports Partial-Power-Down Mode Operation • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors • Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC) • Latch-Up Performance Exceeds 250 mA Per JESD 17 • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) This 16-bit buffer/driver is designed for 1.65-V to 3.6-V VCC operation. The SN74LVCH16240A is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. This device provides inverting outputs and symmetrical active-low output-enable (OE) inputs. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING Tube SN74LVCH16240ADL SSOP – DL LVCH16240A –40 °C to 85°C Tape and reel SN74LVCH16240ADLR TSSOP – DGG Tape and reel SN74LVCH16240ADGGR LVCH16240A (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 1996–2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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