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SN74LVC1G38 Datasheet(PDF) 2 Page - Texas Instruments

Part # SN74LVC1G38
Description  Single 2-Input NAND Gate With Open-Drain Output
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

SN74LVC1G38 Datasheet(HTML) 2 Page - Texas Instruments

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1
2
4
A
B
Y
SN74LVC1G38
SCES538D – JANUARY 2004 – REVISED DECEMBER 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Function Table
INPUTS
OUTPUT
Y
A
B
L
L
H
L
H
H
H
L
H
H
H
L
Logic Diagram (Positive Logic)
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.5
6.5
V
VI
Input voltage range(2)
–0.5
6.5
V
VO
Voltage range applied to any output in the high-impedance or power-off state (2)
–0.5
6.5
V
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
Continuous current through VCC or GND
±100
mA
DBV package
206
θJA
Package thermal impedance(3)
DCK package
252
°C/W
YEP or YZP package
132
Tstg
Storage temperature range
–65
150
°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3)
The package thermal impedance is calculated in accordance with JESD 51-7.
2
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Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: SN74LVC1G38


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