SN54LV74, SN74LV74

DUAL POSITIVEEDGETRIGGERED DTYPE FLIPFLOPS

SCLS189C − FEBRUARY 1993 − REVISED APRIL 1996

1

POST OFFICE BOX 655303

POST OFFICE BOX 1443

CMOS) 2-

µ Process

MIL-STD-883C, Method 3015; Exceeds

200 V Using Machine Model

(C = 200 pF, R = 0)

Per JEDEC Standard JESD-17

Small-Outline (D), Shrink Small-Outline

(DB), Thin Shrink Small-Outline (PW),

Ceramic Flat (W) Packages, Chip Carriers

(FK), and (J) 300-mil DIPs

description

These dual positive-edge-triggered D-type flip-

operation.

A low level at the preset (PRE) or clear (CLR)

inputs sets or resets the outputs regardless of the

levels of the other inputs. When PRE and CLR are

inactive (high), data at the data (D) inputs meeting

the setup-time requirements is transferred to the

outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly

related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed

without affecting the levels at the outputs.

The SN74LV74 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count

and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54LV74 is characterized for operation over the full military temperature range of −55

°C to 125°C. The

SN74LV74 is characterized for operation from −40

°C to 85°C.

Copyright

 1996, Texas Instruments Incorporated

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

1

2

3

4

5

6

7

14

13

12

11

10

9

8

1CLR

1D

1CLK

1PRE

1Q

1Q

GND

2CLR

2D

2CLK

2PRE

2Q

2Q

SN54LV74 ...J OR W PACKAGE

SN74LV74 . . . D, DP, OR PW PACKAGE

(TOP VIEW)

32 1 20 19

910 11 1213

4

5

6

7

8

18

17

16

15

14

2D

NC

2CLK

NC

2PRE

1CLK

NC

1PRE

NC

1Q

SN54LV74 . . . FK PACKAGE

(TOP VIEW)

NC − No internal connection

EPIC is a trademark of Texas Instruments Incorporated.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.