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XRA1200P Datasheet(PDF) 3 Page - Exar Corporation |
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XRA1200P Datasheet(HTML) 3 Page - Exar Corporation |
3 / 16 page XRA1200/1200P 3 REV. 1.0.0 8-BIT I2C/SMBUS GPIO EXPANDER PIN DESCRIPTIONS Pin Description NAME PIN# PIN# TYPE DESCRIPTION I2C INTERFACE SDA 13 15 I/O I2C-bus data input/output (open-drain). SCL 12 14 I I2C-bus serial input clock. IRQ# 11 13 OD Interrupt output (open-drain, active LOW). A0 A1 A2 15 16 1 1 2 3 I I I These pins select the I2C slave address. See Table 1. GPIOs P0 P1 P2 P3 P4 P5 P6 P7 2 3 4 5 7 8 9 10 4 5 6 7 9 10 11 12 I/O I/O I/O I/O I/O I/O I/O I/O General purpose I/Os P0-P7. All GPIOs are configured as inputs upon power- up or after a reset. After power-up or reset, the internal pull-up resistors are enabled for the XRA1200P. The internal pull-up resistors are disabled for the XRA1200. ANCILLARY SIGNALS VCC 14 16 Pwr 1.65V to 3.6V VCC supply voltage. GND 6 8 Pwr Power supply common, ground. GND Center Pad - Pwr The exposed pad at the bottom surface of the package is designed for thermal performance. Use of a center pad on the PCB is strongly recommended for ther- mal conductivity as well as to provide mechanical stability of the package on the PCB. The center pad is recommended to be solder masked defined with open- ing size less than or equal to the exposed thermal pad on the package bottom to prevent solder bridging to the outer leads of the device. Thermal vias must be connected to GND plane as the thermal pad of package is at GND potential. Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain. QFN-16 TSSOP-16 |
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