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LM53602-Q1 Datasheet(PDF) 22 Page - Texas Instruments |
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LM53602-Q1 Datasheet(HTML) 22 Page - Texas Instruments |
22 / 40 page OUT JA A J OUT V 1 1 R T T I ˜ K K ˜ T 22 LM53602-Q1, LM53603-Q1 SNVSA42B – JUNE 2015 – REVISED MAY 2016 www.ti.com Product Folder Links: LM53602-Q1 LM53603-Q1 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Table 6. Recommenced Inductors MANUFACTURER PART NUMBER SATURATION CURRENT D.C. RESISTANCE Würth 7440650022 6 A 15 m Ω Coilcraft DO3316T-222MLB 7.8 A 11 m Ω Coiltronics MPI4040R3-2R2-R 7.9 A 48 m Ω Vishay IHLP2525CZER2R2M01 14 A 18 m Ω Vishay IHLP2525BDER2R2M01 14 A 28 m Ω Coilcraft XAL6030-222ME 16 A 13 m Ω 9.2.2.5 VCC The VCC pin is the output of the internal LDO, used to supply the control circuits of the LM53603-Q1. This output requires a 3.3 µF to 4.7µF, ceramic capacitor connected from VCC to GND for proper operation. An X7R device with a rating of 10 V is highly recommended. In general this output should not be loaded with any external circuitry. However, it can be used to supply a logic level to the FPWM input, or for the pull-up resistor used with the RESET output (see Figure 16 ). The nominal output of the LDO is 3.15 V. 9.2.2.6 BIAS The BIAS pin is the input to the internal LDO. As mentioned in Input Supply Current, this input is connected to VOUT in order to provide the lowest possible supply current at light loads. Since this input is connected directly to the output, it should be protected from negative voltage transients. Such transients may occur when the output is shorted at the end of a long PCB trace or cable. If this is likely, in a given application, then a small resistor should be placed in series between the BIAS input and VOUT, as shown in Figure 15. The resistor should be sized to limit the current out of the BIAS pin to <100 mA. Values in the range of 2 Ω to 5 Ω are usually sufficient. Values greater than 5 Ω are not recommended. As a rough estimate, assume that the full negative transient will appear across RBIAS, and design for a current of < 100 mA. In severe cases, a Schottky diode can be placed in parallel with the output to limit the transient voltage and current. 9.2.2.7 CBOOT The LM53603-Q1 requires a "boot-strap" capacitor between the CBOOT pin and the SW pin. This capacitor stores energy that is used to supply the gate drivers for the power MOSFETs. A ceramic capacitor of 0.47 µF, ≥6.3 V is required. A 10V rated capacitor or higher is highly recommended. 9.2.2.8 Maximum Ambient Temperature As with any power conversion device, the LM53603-Q1 will dissipate internal power while operating. The effect of this power dissipation is to raise the internal temperature of the converter, above ambient. The internal die temperature (TJ) is a function of the ambient temperature, the power loss and the effective thermal resistance, RθJA of the device and PCB combination. The maximum internal die temperature for the LM53603-Q1 is 150°C, thus establishing a limit on the maximum device power dissipation and therefore load current at high ambient temperatures. Equation 5 shows the relationships between the important parameters. (5) It is easy to see that larger ambient temperatures (TA) and larger values of RθJA will reduce the maximum available output current. As stated in SPRA953, the values given in the Thermal Information table are not valid for design purposes and must not be used to estimate the thermal performance of the application. The values reported in that table were measured under a specific set of conditions that are never obtained in an actual application. The effective RθJA is a critical parameter and depends on many factors such as power dissipation, air temperature, PCB area, copper heat-sink area, number of thermal vias under the package, air flow, and adjacent component placement. The LM53603-Q1 utilizes an advanced package with a heat spreading pad (EP) on the bottom. This must be soldered directly to the PCB copper ground plane to provide an effective heat-sink, as well as a proper electrical connection. The resources found in Table 9 can be used as a guide to optimal thermal PCB design and estimating RθJA for a given application environment. A typical example of RθJA versus copper board area is shown in Figure 17. The copper area in this graph is that for each layer of a four layer board; the |
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