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LPC2106BBD48 Datasheet(PDF) 11 Page - NXP Semiconductors |
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LPC2106BBD48 Datasheet(HTML) 11 Page - NXP Semiconductors |
11 / 32 page Philips Semiconductors LPC2104/2105/2106 Single-chip 32-bit microcontrollers Product data Rev. 04 — 05 February 2004 11 of 32 9397 750 12792 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 6.5 Interrupt controller The Vectored Interrupt Controller (VIC) accepts all of the interrupt request inputs and categorizes, them as FIQ, vectored IRQ, and non-vectored IRQ as defined by programmable settings. The programmable assignment scheme means that priorities of interrupts from the various peripherals can be dynamically assigned and adjusted. Fast Interrupt reQuest (FIQ) has the highest priority. If more than one request is assigned to FIQ, the VIC combines the requests to produce the FIQ signal to the ARM processor. The fastest possible FIQ latency is achieved when only one request is classified as FIQ, because then the FIQ service routine can simply start dealing with that device. But if more than one request is assigned to the FIQ class, the FIQ service routine can read a word from the VIC that identifies which FIQ source(s) is (are) requesting an interrupt. Fig 5. LPC2106 memory map. AHB PERIPHERALS VPB PERIPHERALS RESERVED ADDRESS SPACE BOOT BLOCK (RE-MAPPED FROM ON-CHIP FLASH MEMORY RESERVED ADDRESS SPACE 64 KBYTE ON-CHIP STATIC RAM RESERVED ADDRESS SPACE 128 KBYTE ON-CHIP FLASH MEMORY 0xFFFF FFFF 0xF000 0000 0xEFFF FFFF 0xE000 0000 0xC000 0000 0xDFFF FFFF 0x8000 0000 0x7FFF FFFF 0x7FFF E000 0x7FFF DFFF 0x4001 0000 0x4000 FFFF 0x4000 0000 0x3FFF FFFF 0x0002 0000 0x0001 FFFF 0x0000 0000 4.0 GB 3.75 GB 3.5 GB 3.0 GB 2.0 GB 1.0 GB 0.0 GB 002aaa413 |
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